aram .align 4 .b8 activation_4_param_0[16]
)
{
.pragma "abi_param_reg all";
	.reg .pred 	%p<5>;
	.reg .f32 	%f<40>;


	ld.param.f32 	%f4, [activation_4_param_0+12];
	ld.param.f32 	%f3, [activation_4_param_0+8];
	ld.param.f32 	%f2, [activation_4_param_0+4];
	ld.param.f32 	%f7, [activation_4_param_0];
	ld.const.f32 	%f23, [params+4];
	ld.const.f32 	%f5, [params];
	mul.ftz.f32 	%f6, %f23, %f5;
	setp.gt.ftz.f32 	%p1, %f7, 0f00000000;
	@%p1 bra 	$L__BB0_2;
	bra.uni 	$L__BB0_1;

$L__BB0_2:
	mul.ftz.f32 	%f36, %f7, %f5;
	bra.uni 	$L__BB0_3;

$L__BB0_1:
	mul.ftz.f32 	%f24, %f7, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f25, %f24;
	add.ftz.f32 	%f26, %f25, 0fBF800000;
	mul.ftz.f32 	%f36, %f6, %f26;

$L__BB0_3:
	setp.gt.ftz.f32 	%p2, %f2, 0f00000000;
	@%p2 bra 	$L__BB0_5;
	bra.uni 	$L__BB0_4;

$L__BB0_5:
	mul.ftz.f32 	%f37, %f2, %f5;
	bra.uni 	$L__BB0_6;

$L__BB0_4:
	mul.ftz.f32 	%f27, %f2, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f28, %f27;
	add.ftz.f32 	%f29, %f28, 0fBF800000;
	mul.ftz.f32 	%f37, %f6, %f29;

$L__BB0_6:
	setp.gt.ftz.f32 	%p3, %f3, 0f00000000;
	@%p3 bra 	$L__BB0_8;
	bra.uni 	$L__BB0_7;

$L__BB0_8:
	mul.ftz.f32 	%f38, %f3, %f5;
	bra.uni 	$L__BB0_9;

$L__BB0_7:
	mul.ftz.f32 	%f30, %f3, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f31, %f30;
	add.ftz.f32 	%f32, %f31, 0fBF800000;
	mul.ftz.f32 	%f38, %f6, %f32;

$L__BB0_9:
	setp.gt.ftz.f32 	%p4, %f4, 0f00000000;
	@%p4 bra 	$L__BB0_11;
	bra.uni 	$L__BB0_10;

$L__BB0_11:
	mul.ftz.f32 	%f39, %f4, %f5;
	bra.uni 	$L__BB0_12;

$L__BB0_10:
	mul.ftz.f32 	%f33, %f4, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f34, %f33;
	add.ftz.f32 	%f35, %f34, 0fBF800000;
	mul.ftz.f32 	%f39, %f6, %f35;

$L__BB0_12:
	st.param.f32 	[func_retval0+0], %f36;
	st.param.f32 	[func_retval0+4], %f37;
	st.param.f32 	[func_retval0+8], %f38;
	st.param.f32 	[func_retval0+12], %f39;
	ret;

}