ID: CL-31678015
// Cuda compilation tools, release 11.8, V11.8.85
// Based on NVVM 7.0.1
//

.version 7.8
.target sm_80
.address_size 64

	// .globl	activation_16
.visible .const .align 4 .b8 params[8];

.visible .func  (.param .align 4 .b8 func_retval0[64]) activation_16(
	.param .align 4 .b8 activation_16_param_0[64]
)
{
.pragma "abi_param_reg all";
	.reg .pred 	%p<65>;
	.reg .b16 	%rs<143>;
	.reg .f32 	%f<867>;
	.reg .b32 	%r<161>;


	ld.param.f32 	%f1, [activation_16_param_0];
	mov.b32 	%r1, %f1;
	ld.param.f32 	%f16, [activation_16_param_0+60];
	ld.param.f32 	%f15, [activation_16_param_0+56];
	ld.param.f32 	%f14, [activation_16_param_0+52];
	ld.param.f32 	%f13, [activation_16_param_0+48];
	ld.param.f32 	%f12, [activation_16_param_0+44];
	ld.param.f32 	%f11, [activation_16_param_0+40];
	ld.param.f32 	%f10, [activation_16_param_0+36];
	ld.param.f32 	%f9, [activation_16_param_0+32];
	ld.param.f32 	%f8, [activation_16_param_0+28];
	ld.param.f32 	%f7, [activation_16_param_0+24];
	ld.param.f32 	%f6, [activation_16_param_0+20];
	ld.param.f32 	%f5, [activation_16_param_0+16];
	ld.param.f32 	%f4, [activation_16_param_0+12];
	ld.param.f32 	%f3, [activation_16_param_0+8];
	ld.param.f32 	%f2, [activation_16_param_0+4];
	mov.b32 	{%rs79, %rs2}, %r1;
	// begin inline asm
	{  cvt.f32.f16 %f179, %rs79;}

	// end inline asm
	ld.const.f32 	%f17, [params];
	ld.const.f32 	%f18, [params+4];
	mul.ftz.f32 	%f19, %f179, %f18;
	abs.ftz.f32 	%f20, %f19;
	setp.ltu.ftz.f32 	%p1, %f20, 0f3F19999A;
	@%p1 bra 	$L__BB0_2;
	bra.uni 	$L__BB0_1;

$L__BB0_2:
	mul.ftz.f32 	%f188, %f19, %f19;
	mov.f32 	%f189, 0fBD563CAE;
	mov.f32 	%f190, 0f3C80F082;
	fma.rn.ftz.f32 	%f191, %f190, %f188, %f189;
	mov.f32 	%f192, 0f3E085941;
	fma.rn.ftz.f32 	%f193, %f191, %f188, %f192;
	mov.f32 	%f194, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f195, %f193, %f188, %f194;
	mov.f32 	%f196, 0f00000000;
	fma.rn.ftz.f32 	%f197, %f195, %f188, %f196;
	fma.rn.ftz.f32 	%f835, %f197, %f19, %f19;
	bra.uni 	$L__BB0_3;

$L__BB0_1:
	mul.ftz.f32 	%f180, %f20, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f181, %f180;
	add.ftz.f32 	%f182, %f181, 0f3F800000;
	mov.f32 	%f183, 0f3F800000;
	rcp.approx.ftz.f32 	%f184, %f182;
	mov.f32 	%f185, 0fC0000000;
	fma.rn.ftz.f32 	%f186, %f184, %f185, %f183;
	setp.ge.ftz.f32 	%p2, %f20, 0f41102CB4;
	selp.f32 	%f187, 0f3F800000, %f186, %p2;
	mov.b32 	%r2, %f187;
	mov.b32 	%r3, %f19;
	and.b32  	%r4, %r3, -2147483648;
	or.b32  	%r5, %r4, %r2;
	mov.b32 	%f835, %r5;

$L__BB0_3:
	mul.ftz.f32 	%f198, %f17, %f835;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs80, %f198;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f199, %rs2;}

	// end inline asm
	mul.ftz.f32 	%f24, %f199, %f18;
	abs.ftz.f32 	%f25, %f24;
	setp.ltu.ftz.f32 	%p3, %f25, 0f3F19999A;
	@%p3 bra 	$L__BB0_5;
	bra.uni 	$L__BB0_4;

$L__BB0_5:
	mul.ftz.f32 	%f208, %f24, %f24;
	mov.f32 	%f209, 0fBD563CAE;
	mov.f32 	%f210, 0f3C80F082;
	fma.rn.ftz.f32 	%f211, %f210, %f208, %f209;
	mov.f32 	%f212, 0f3E085941;
	fma.rn.ftz.f32 	%f213, %f211, %f208, %f212;
	mov.f32 	%f214, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f215, %f213, %f208, %f214;
	mov.f32 	%f216, 0f00000000;
	fma.rn.ftz.f32 	%f217, %f215, %f208, %f216;
	fma.rn.ftz.f32 	%f836, %f217, %f24, %f24;
	bra.uni 	$L__BB0_6;

$L__BB0_4:
	mul.ftz.f32 	%f200, %f25, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f201, %f200;
	add.ftz.f32 	%f202, %f201, 0f3F800000;
	mov.f32 	%f203, 0f3F800000;
	rcp.approx.ftz.f32 	%f204, %f202;
	mov.f32 	%f205, 0fC0000000;
	fma.rn.ftz.f32 	%f206, %f204, %f205, %f203;
	setp.ge.ftz.f32 	%p4, %f25, 0f41102CB4;
	selp.f32 	%f207, 0f3F800000, %f206, %p4;
	mov.b32 	%r6, %f207;
	mov.b32 	%r7, %f24;
	and.b32  	%r8, %r7, -2147483648;
	or.b32  	%r9, %r8, %r6;
	mov.b32 	%f836, %r9;

$L__BB0_6:
	mul.ftz.f32 	%f218, %f17, %f836;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs82, %f218;}

	// end inline asm
	mov.b32 	%r10, %f2;
	mov.b32 	{%rs83, %rs7}, %r10;
	// begin inline asm
	{  cvt.f32.f16 %f219, %rs83;}

	// end inline asm
	mul.ftz.f32 	%f29, %f219, %f18;
	abs.ftz.f32 	%f30, %f29;
	setp.ltu.ftz.f32 	%p5, %f30, 0f3F19999A;
	@%p5 bra 	$L__BB0_8;
	bra.uni 	$L__BB0_7;

$L__BB0_8:
	mul.ftz.f32 	%f228, %f29, %f29;
	mov.f32 	%f229, 0fBD563CAE;
	mov.f32 	%f230, 0f3C80F082;
	fma.rn.ftz.f32 	%f231, %f230, %f228, %f229;
	mov.f32 	%f232, 0f3E085941;
	fma.rn.ftz.f32 	%f233, %f231, %f228, %f232;
	mov.f32 	%f234, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f235, %f233, %f228, %f234;
	mov.f32 	%f236, 0f00000000;
	fma.rn.ftz.f32 	%f237, %f235, %f228, %f236;
	fma.rn.ftz.f32 	%f837, %f237, %f29, %f29;
	bra.uni 	$L__BB0_9;

$L__BB0_7:
	mul.ftz.f32 	%f220, %f30, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f221, %f220;
	add.ftz.f32 	%f222, %f221, 0f3F800000;
	mov.f32 	%f223, 0f3F800000;
	rcp.approx.ftz.f32 	%f224, %f222;
	mov.f32 	%f225, 0fC0000000;
	fma.rn.ftz.f32 	%f226, %f224, %f225, %f223;
	setp.ge.ftz.f32 	%p6, %f30, 0f41102CB4;
	selp.f32 	%f227, 0f3F800000, %f226, %p6;
	mov.b32 	%r11, %f227;
	mov.b32 	%r12, %f29;
	and.b32  	%r13, %r12, -2147483648;
	or.b32  	%r14, %r13, %r11;
	mov.b32 	%f837, %r14;

$L__BB0_9:
	mul.ftz.f32 	%f238, %f17, %f837;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs84, %f238;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f239, %rs7;}

	// end inline asm
	mul.ftz.f32 	%f34, %f239, %f18;
	abs.ftz.f32 	%f35, %f34;
	setp.ltu.ftz.f32 	%p7, %f35, 0f3F19999A;
	@%p7 bra 	$L__BB0_11;
	bra.uni 	$L__BB0_10;

$L__BB0_11:
	mul.ftz.f32 	%f248, %f34, %f34;
	mov.f32 	%f249, 0fBD563CAE;
	mov.f32 	%f250, 0f3C80F082;
	fma.rn.ftz.f32 	%f251, %f250, %f248, %f249;
	mov.f32 	%f252, 0f3E085941;
	fma.rn.ftz.f32 	%f253, %f251, %f248, %f252;
	mov.f32 	%f254, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f255, %f253, %f248, %f254;
	mov.f32 	%f256, 0f00000000;
	fma.rn.ftz.f32 	%f257, %f255, %f248, %f256;
	fma.rn.ftz.f32 	%f838, %f257, %f34, %f34;
	bra.uni 	$L__BB0_12;

$L__BB0_10:
	mul.ftz.f32 	%f240, %f35, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f241, %f240;
	add.ftz.f32 	%f242, %f241, 0f3F800000;
	mov.f32 	%f243, 0f3F800000;
	rcp.approx.ftz.f32 	%f244, %f242;
	mov.f32 	%f245, 0fC0000000;
	fma.rn.ftz.f32 	%f246, %f244, %f245, %f243;
	setp.ge.ftz.f32 	%p8, %f35, 0f41102CB4;
	selp.f32 	%f247, 0f3F800000, %f246, %p8;
	mov.b32 	%r15, %f247;
	mov.b32 	%r16, %f34;
	and.b32  	%r17, %r16, -2147483648;
	or.b32  	%r18, %r17, %r15;
	mov.b32 	%f838, %r18;

$L__BB0_12:
	mul.ftz.f32 	%f258, %f17, %f838;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs86, %f258;}

	// end inline asm
	mov.b32 	%r19, %f3;
	mov.b32 	{%rs87, %rs12}, %r19;
	// begin inline asm
	{  cvt.f32.f16 %f259, %rs87;}

	// end inline asm
	mul.ftz.f32 	%f39, %f259, %f18;
	abs.ftz.f32 	%f40, %f39;
	setp.ltu.ftz.f32 	%p9, %f40, 0f3F19999A;
	@%p9 bra 	$L__BB0_14;
	bra.uni 	$L__BB0_13;

$L__BB0_14:
	mul.ftz.f32 	%f268, %f39, %f39;
	mov.f32 	%f269, 0fBD563CAE;
	mov.f32 	%f270, 0f3C80F082;
	fma.rn.ftz.f32 	%f271, %f270, %f268, %f269;
	mov.f32 	%f272, 0f3E085941;
	fma.rn.ftz.f32 	%f273, %f271, %f268, %f272;
	mov.f32 	%f274, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f275, %f273, %f268, %f274;
	mov.f32 	%f276, 0f00000000;
	fma.rn.ftz.f32 	%f277, %f275, %f268, %f276;
	fma.rn.ftz.f32 	%f839, %f277, %f39, %f39;
	bra.uni 	$L__BB0_15;

$L__BB0_13:
	mul.ftz.f32 	%f260, %f40, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f261, %f260;
	add.ftz.f32 	%f262, %f261, 0f3F800000;
	mov.f32 	%f263, 0f3F800000;
	rcp.approx.ftz.f32 	%f264, %f262;
	mov.f32 	%f265, 0fC0000000;
	fma.rn.ftz.f32 	%f266, %f264, %f265, %f263;
	setp.ge.ftz.f32 	%p10, %f40, 0f41102CB4;
	selp.f32 	%f267, 0f3F800000, %f266, %p10;
	mov.b32 	%r20, %f267;
	mov.b32 	%r21, %f39;
	and.b32  	%r22, %r21, -2147483648;
	or.b32  	%r23, %r22, %r20;
	mov.b32 	%f839, %r23;

$L__BB0_15:
	mul.ftz.f32 	%f278, %f17, %f839;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs88, %f278;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f279, %rs12;}

	// end inline asm
	mul.ftz.f32 	%f44, %f279, %f18;
	abs.ftz.f32 	%f45, %f44;
	setp.ltu.ftz.f32 	%p11, %f45, 0f3F19999A;
	@%p11 bra 	$L__BB0_17;
	bra.uni 	$L__BB0_16;

$L__BB0_17:
	mul.ftz.f32 	%f288, %f44, %f44;
	mov.f32 	%f289, 0fBD563CAE;
	mov.f32 	%f290, 0f3C80F082;
	fma.rn.ftz.f32 	%f291, %f290, %f288, %f289;
	mov.f32 	%f292, 0f3E085941;
	fma.rn.ftz.f32 	%f293, %f291, %f288, %f292;
	mov.f32 	%f294, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f295, %f293, %f288, %f294;
	mov.f32 	%f296, 0f00000000;
	fma.rn.ftz.f32 	%f297, %f295, %f288, %f296;
	fma.rn.ftz.f32 	%f840, %f297, %f44, %f44;
	bra.uni 	$L__BB0_18;

$L__BB0_16:
	mul.ftz.f32 	%f280, %f45, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f281, %f280;
	add.ftz.f32 	%f282, %f281, 0f3F800000;
	mov.f32 	%f283, 0f3F800000;
	rcp.approx.ftz.f32 	%f284, %f282;
	mov.f32 	%f285, 0fC0000000;
	fma.rn.ftz.f32 	%f286, %f284, %f285, %f283;
	setp.ge.ftz.f32 	%p12, %f45, 0f41102CB4;
	selp.f32 	%f287, 0f3F800000, %f286, %p12;
	mov.b32 	%r24, %f287;
	mov.b32 	%r25, %f44;
	and.b32  	%r26, %r25, -2147483648;
	or.b32  	%r27, %r26, %r24;
	mov.b32 	%f840, %r27;

$L__BB0_18:
	mul.ftz.f32 	%f298, %f17, %f840;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs90, %f298;}

	// end inline asm
	mov.b32 	%r28, %f4;
	mov.b32 	{%rs91, %rs17}, %r28;
	// begin inline asm
	{  cvt.f32.f16 %f299, %rs91;}

	// end inline asm
	mul.ftz.f32 	%f49, %f299, %f18;
	abs.ftz.f32 	%f50, %f49;
	setp.ltu.ftz.f32 	%p13, %f50, 0f3F19999A;
	@%p13 bra 	$L__BB0_20;
	bra.uni 	$L__BB0_19;

$L__BB0_20:
	mul.ftz.f32 	%f308, %f49, %f49;
	mov.f32 	%f309, 0fBD563CAE;
	mov.f32 	%f310, 0f3C80F082;
	fma.rn.ftz.f32 	%f311, %f310, %f308, %f309;
	mov.f32 	%f312, 0f3E085941;
	fma.rn.ftz.f32 	%f313, %f311, %f308, %f312;
	mov.f32 	%f314, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f315, %f313, %f308, %f314;
	mov.f32 	%f316, 0f00000000;
	fma.rn.ftz.f32 	%f317, %f315, %f308, %f316;
	fma.rn.ftz.f32 	%f841, %f317, %f49, %f49;
	bra.uni 	$L__BB0_21;

$L__BB0_19:
	mul.ftz.f32 	%f300, %f50, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f301, %f300;
	add.ftz.f32 	%f302, %f301, 0f3F800000;
	mov.f32 	%f303, 0f3F800000;
	rcp.approx.ftz.f32 	%f304, %f302;
	mov.f32 	%f305, 0fC0000000;
	fma.rn.ftz.f32 	%f306, %f304, %f305, %f303;
	setp.ge.ftz.f32 	%p14, %f50, 0f41102CB4;
	selp.f32 	%f307, 0f3F800000, %f306, %p14;
	mov.b32 	%r29, %f307;
	mov.b32 	%r30, %f49;
	and.b32  	%r31, %r30, -2147483648;
	or.b32  	%r32, %r31, %r29;
	mov.b32 	%f841, %r32;

$L__BB0_21:
	mul.ftz.f32 	%f318, %f17, %f841;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs92, %f318;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f319, %rs17;}

	// end inline asm
	mul.ftz.f32 	%f54, %f319, %f18;
	abs.ftz.f32 	%f55, %f54;
	setp.ltu.ftz.f32 	%p15, %f55, 0f3F19999A;
	@%p15 bra 	$L__BB0_23;
	bra.uni 	$L__BB0_22;

$L__BB0_23:
	mul.ftz.f32 	%f328, %f54, %f54;
	mov.f32 	%f329, 0fBD563CAE;
	mov.f32 	%f330, 0f3C80F082;
	fma.rn.ftz.f32 	%f331, %f330, %f328, %f329;
	mov.f32 	%f332, 0f3E085941;
	fma.rn.ftz.f32 	%f333, %f331, %f328, %f332;
	mov.f32 	%f334, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f335, %f333, %f328, %f334;
	mov.f32 	%f336, 0f00000000;
	fma.rn.ftz.f32 	%f337, %f335, %f328, %f336;
	fma.rn.ftz.f32 	%f842, %f337, %f54, %f54;
	bra.uni 	$L__BB0_24;

$L__BB0_22:
	mul.ftz.f32 	%f320, %f55, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f321, %f320;
	add.ftz.f32 	%f322, %f321, 0f3F800000;
	mov.f32 	%f323, 0f3F800000;
	rcp.approx.ftz.f32 	%f324, %f322;
	mov.f32 	%f325, 0fC0000000;
	fma.rn.ftz.f32 	%f326, %f324, %f325, %f323;
	setp.ge.ftz.f32 	%p16, %f55, 0f41102CB4;
	selp.f32 	%f327, 0f3F800000, %f326, %p16;
	mov.b32 	%r33, %f327;
	mov.b32 	%r34, %f54;
	and.b32  	%r35, %r34, -2147483648;
	or.b32  	%r36, %r35, %r33;
	mov.b32 	%f842, %r36;

$L__BB0_24:
	mul.ftz.f32 	%f338, %f17, %f842;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs94, %f338;}

	// end inline asm
	mov.b32 	%r37, %f5;
	mov.b32 	{%rs95, %rs22}, %r37;
	// begin inline asm
	{  cvt.f32.f16 %f339, %rs95;}

	// end inline asm
	mul.ftz.f32 	%f59, %f339, %f18;
	abs.ftz.f32 	%f60, %f59;
	setp.ltu.ftz.f32 	%p17, %f60, 0f3F19999A;
	@%p17 bra 	$L__BB0_26;
	bra.uni 	$L__BB0_25;

$L__BB0_26:
	mul.ftz.f32 	%f348, %f59, %f59;
	mov.f32 	%f349, 0fBD563CAE;
	mov.f32 	%f350, 0f3C80F082;
	fma.rn.ftz.f32 	%f351, %f350, %f348, %f349;
	mov.f32 	%f352, 0f3E085941;
	fma.rn.ftz.f32 	%f353, %f351, %f348, %f352;
	mov.f32 	%f354, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f355, %f353, %f348, %f354;
	mov.f32 	%f356, 0f00000000;
	fma.rn.ftz.f32 	%f357, %f355, %f348, %f356;
	fma.rn.ftz.f32 	%f843, %f357, %f59, %f59;
	bra.uni 	$L__BB0_27;

$L__BB0_25:
	mul.ftz.f32 	%f340, %f60, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f341, %f340;
	add.ftz.f32 	%f342, %f341, 0f3F800000;
	mov.f32 	%f343, 0f3F800000;
	rcp.approx.ftz.f32 	%f344, %f342;
	mov.f32 	%f345, 0fC0000000;
	fma.rn.ftz.f32 	%f346, %f344, %f345, %f343;
	setp.ge.ftz.f32 	%p18, %f60, 0f41102CB4;
	selp.f32 	%f347, 0f3F800000, %f346, %p18;
	mov.b32 	%r38, %f347;
	mov.b32 	%r39, %f59;
	and.b32  	%r40, %r39, -2147483648;
	or.b32  	%r41, %r40, %r38;
	mov.b32 	%f843, %r41;

$L__BB0_27:
	mul.ftz.f32 	%f358, %f17, %f843;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs96, %f358;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f359, %rs22;}

	// end inline asm
	mul.ftz.f32 	%f64, %f359, %f18;
	abs.ftz.f32 	%f65, %f64;
	setp.ltu.ftz.f32 	%p19, %f65, 0f3F19999A;
	@%p19 bra 	$L__BB0_29;
	bra.uni 	$L__BB0_28;

$L__BB0_29:
	mul.ftz.f32 	%f368, %f64, %f64;
	mov.f32 	%f369, 0fBD563CAE;
	mov.f32 	%f370, 0f3C80F082;
	fma.rn.ftz.f32 	%f371, %f370, %f368, %f369;
	mov.f32 	%f372, 0f3E085941;
	fma.rn.ftz.f32 	%f373, %f371, %f368, %f372;
	mov.f32 	%f374, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f375, %f373, %f368, %f374;
	mov.f32 	%f376, 0f00000000;
	fma.rn.ftz.f32 	%f377, %f375, %f368, %f376;
	fma.rn.ftz.f32 	%f844, %f377, %f64, %f64;
	bra.uni 	$L__BB0_30;

$L__BB0_28:
	mul.ftz.f32 	%f360, %f65, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f361, %f360;
	add.ftz.f32 	%f362, %f361, 0f3F800000;
	mov.f32 	%f363, 0f3F800000;
	rcp.approx.ftz.f32 	%f364, %f362;
	mov.f32 	%f365, 0fC0000000;
	fma.rn.ftz.f32 	%f366, %f364, %f365, %f363;
	setp.ge.ftz.f32 	%p20, %f65, 0f41102CB4;
	selp.f32 	%f367, 0f3F800000, %f366, %p20;
	mov.b32 	%r42, %f367;
	mov.b32 	%r43, %f64;
	and.b32  	%r44, %r43, -2147483648;
	or.b32  	%r45, %r44, %r42;
	mov.b32 	%f844, %r45;

$L__BB0_30:
	mul.ftz.f32 	%f378, %f17, %f844;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs98, %f378;}

	// end inline asm
	mov.b32 	%r46, %f6;
	mov.b32 	{%rs99, %rs27}, %r46;
	// begin inline asm
	{  cvt.f32.f16 %f379, %rs99;}

	// end inline asm
	mul.ftz.f32 	%f69, %f379, %f18;
	abs.ftz.f32 	%f70, %f69;
	setp.ltu.ftz.f32 	%p21, %f70, 0f3F19999A;
	@%p21 bra 	$L__BB0_32;
	bra.uni 	$L__BB0_31;

$L__BB0_32:
	mul.ftz.f32 	%f388, %f69, %f69;
	mov.f32 	%f389, 0fBD563CAE;
	mov.f32 	%f390, 0f3C80F082;
	fma.rn.ftz.f32 	%f391, %f390, %f388, %f389;
	mov.f32 	%f392, 0f3E085941;
	fma.rn.ftz.f32 	%f393, %f391, %f388, %f392;
	mov.f32 	%f394, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f395, %f393, %f388, %f394;
	mov.f32 	%f396, 0f00000000;
	fma.rn.ftz.f32 	%f397, %f395, %f388, %f396;
	fma.rn.ftz.f32 	%f845, %f397, %f69, %f69;
	bra.uni 	$L__BB0_33;

$L__BB0_31:
	mul.ftz.f32 	%f380, %f70, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f381, %f380;
	add.ftz.f32 	%f382, %f381, 0f3F800000;
	mov.f32 	%f383, 0f3F800000;
	rcp.approx.ftz.f32 	%f384, %f382;
	mov.f32 	%f385, 0fC0000000;
	fma.rn.ftz.f32 	%f386, %f384, %f385, %f383;
	setp.ge.ftz.f32 	%p22, %f70, 0f41102CB4;
	selp.f32 	%f387, 0f3F800000, %f386, %p22;
	mov.b32 	%r47, %f387;
	mov.b32 	%r48, %f69;
	and.b32  	%r49, %r48, -2147483648;
	or.b32  	%r50, %r49, %r47;
	mov.b32 	%f845, %r50;

$L__BB0_33:
	mul.ftz.f32 	%f398, %f17, %f845;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs100, %f398;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f399, %rs27;}

	// end inline asm
	mul.ftz.f32 	%f74, %f399, %f18;
	abs.ftz.f32 	%f75, %f74;
	setp.ltu.ftz.f32 	%p23, %f75, 0f3F19999A;
	@%p23 bra 	$L__BB0_35;
	bra.uni 	$L__BB0_34;

$L__BB0_35:
	mul.ftz.f32 	%f408, %f74, %f74;
	mov.f32 	%f409, 0fBD563CAE;
	mov.f32 	%f410, 0f3C80F082;
	fma.rn.ftz.f32 	%f411, %f410, %f408, %f409;
	mov.f32 	%f412, 0f3E085941;
	fma.rn.ftz.f32 	%f413, %f411, %f408, %f412;
	mov.f32 	%f414, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f415, %f413, %f408, %f414;
	mov.f32 	%f416, 0f00000000;
	fma.rn.ftz.f32 	%f417, %f415, %f408, %f416;
	fma.rn.ftz.f32 	%f846, %f417, %f74, %f74;
	bra.uni 	$L__BB0_36;

$L__BB0_34:
	mul.ftz.f32 	%f400, %f75, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f401, %f400;
	add.ftz.f32 	%f402, %f401, 0f3F800000;
	mov.f32 	%f403, 0f3F800000;
	rcp.approx.ftz.f32 	%f404, %f402;
	mov.f32 	%f405, 0fC0000000;
	fma.rn.ftz.f32 	%f406, %f404, %f405, %f403;
	setp.ge.ftz.f32 	%p24, %f75, 0f41102CB4;
	selp.f32 	%f407, 0f3F800000, %f406, %p24;
	mov.b32 	%r51, %f407;
	mov.b32 	%r52, %f74;
	and.b32  	%r53, %r52, -2147483648;
	or.b32  	%r54, %r53, %r51;
	mov.b32 	%f846, %r54;

$L__BB0_36:
	mul.ftz.f32 	%f418, %f17, %f846;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs102, %f418;}

	// end inline asm
	mov.b32 	%r55, %f7;
	mov.b32 	{%rs103, %rs32}, %r55;
	// begin inline asm
	{  cvt.f32.f16 %f419, %rs103;}

	// end inline asm
	mul.ftz.f32 	%f79, %f419, %f18;
	abs.ftz.f32 	%f80, %f79;
	setp.ltu.ftz.f32 	%p25, %f80, 0f3F19999A;
	@%p25 bra 	$L__BB0_38;
	bra.uni 	$L__BB0_37;

$L__BB0_38:
	mul.ftz.f32 	%f428, %f79, %f79;
	mov.f32 	%f429, 0fBD563CAE;
	mov.f32 	%f430, 0f3C80F082;
	fma.rn.ftz.f32 	%f431, %f430, %f428, %f429;
	mov.f32 	%f432, 0f3E085941;
	fma.rn.ftz.f32 	%f433, %f431, %f428, %f432;
	mov.f32 	%f434, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f435, %f433, %f428, %f434;
	mov.f32 	%f436, 0f00000000;
	fma.rn.ftz.f32 	%f437, %f435, %f428, %f436;
	fma.rn.ftz.f32 	%f847, %f437, %f79, %f79;
	bra.uni 	$L__BB0_39;

$L__BB0_37:
	mul.ftz.f32 	%f420, %f80, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f421, %f420;
	add.ftz.f32 	%f422, %f421, 0f3F800000;
	mov.f32 	%f423, 0f3F800000;
	rcp.approx.ftz.f32 	%f424, %f422;
	mov.f32 	%f425, 0fC0000000;
	fma.rn.ftz.f32 	%f426, %f424, %f425, %f423;
	setp.ge.ftz.f32 	%p26, %f80, 0f41102CB4;
	selp.f32 	%f427, 0f3F800000, %f426, %p26;
	mov.b32 	%r56, %f427;
	mov.b32 	%r57, %f79;
	and.b32  	%r58, %r57, -2147483648;
	or.b32  	%r59, %r58, %r56;
	mov.b32 	%f847, %r59;

$L__BB0_39:
	mul.ftz.f32 	%f438, %f17, %f847;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs104, %f438;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f439, %rs32;}

	// end inline asm
	mul.ftz.f32 	%f84, %f439, %f18;
	abs.ftz.f32 	%f85, %f84;
	setp.ltu.ftz.f32 	%p27, %f85, 0f3F19999A;
	@%p27 bra 	$L__BB0_41;
	bra.uni 	$L__BB0_40;

$L__BB0_41:
	mul.ftz.f32 	%f448, %f84, %f84;
	mov.f32 	%f449, 0fBD563CAE;
	mov.f32 	%f450, 0f3C80F082;
	fma.rn.ftz.f32 	%f451, %f450, %f448, %f449;
	mov.f32 	%f452, 0f3E085941;
	fma.rn.ftz.f32 	%f453, %f451, %f448, %f452;
	mov.f32 	%f454, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f455, %f453, %f448, %f454;
	mov.f32 	%f456, 0f00000000;
	fma.rn.ftz.f32 	%f457, %f455, %f448, %f456;
	fma.rn.ftz.f32 	%f848, %f457, %f84, %f84;
	bra.uni 	$L__BB0_42;

$L__BB0_40:
	mul.ftz.f32 	%f440, %f85, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f441, %f440;
	add.ftz.f32 	%f442, %f441, 0f3F800000;
	mov.f32 	%f443, 0f3F800000;
	rcp.approx.ftz.f32 	%f444, %f442;
	mov.f32 	%f445, 0fC0000000;
	fma.rn.ftz.f32 	%f446, %f444, %f445, %f443;
	setp.ge.ftz.f32 	%p28, %f85, 0f41102CB4;
	selp.f32 	%f447, 0f3F800000, %f446, %p28;
	mov.b32 	%r60, %f447;
	mov.b32 	%r61, %f84;
	and.b32  	%r62, %r61, -2147483648;
	or.b32  	%r63, %r62, %r60;
	mov.b32 	%f848, %r63;

$L__BB0_42:
	mul.ftz.f32 	%f458, %f17, %f848;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs106, %f458;}

	// end inline asm
	mov.b32 	%r64, %f8;
	mov.b32 	{%rs107, %rs37}, %r64;
	// begin inline asm
	{  cvt.f32.f16 %f459, %rs107;}

	// end inline asm
	mul.ftz.f32 	%f89, %f459, %f18;
	abs.ftz.f32 	%f90, %f89;
	setp.ltu.ftz.f32 	%p29, %f90, 0f3F19999A;
	@%p29 bra 	$L__BB0_44;
	bra.uni 	$L__BB0_43;

$L__BB0_44:
	mul.ftz.f32 	%f468, %f89, %f89;
	mov.f32 	%f469, 0fBD563CAE;
	mov.f32 	%f470, 0f3C80F082;
	fma.rn.ftz.f32 	%f471, %f470, %f468, %f469;
	mov.f32 	%f472, 0f3E085941;
	fma.rn.ftz.f32 	%f473, %f471, %f468, %f472;
	mov.f32 	%f474, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f475, %f473, %f468, %f474;
	mov.f32 	%f476, 0f00000000;
	fma.rn.ftz.f32 	%f477, %f475, %f468, %f476;
	fma.rn.ftz.f32 	%f849, %f477, %f89, %f89;
	bra.uni 	$L__BB0_45;

$L__BB0_43:
	mul.ftz.f32 	%f460, %f90, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f461, %f460;
	add.ftz.f32 	%f462, %f461, 0f3F800000;
	mov.f32 	%f463, 0f3F800000;
	rcp.approx.ftz.f32 	%f464, %f462;
	mov.f32 	%f465, 0fC0000000;
	fma.rn.ftz.f32 	%f466, %f464, %f465, %f463;
	setp.ge.ftz.f32 	%p30, %f90, 0f41102CB4;
	selp.f32 	%f467, 0f3F800000, %f466, %p30;
	mov.b32 	%r65, %f467;
	mov.b32 	%r66, %f89;
	and.b32  	%r67, %r66, -2147483648;
	or.b32  	%r68, %r67, %r65;
	mov.b32 	%f849, %r68;

$L__BB0_45:
	mul.ftz.f32 	%f478, %f17, %f849;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs108, %f478;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f479, %rs37;}

	// end inline asm
	mul.ftz.f32 	%f94, %f479, %f18;
	abs.ftz.f32 	%f95, %f94;
	setp.ltu.ftz.f32 	%p31, %f95, 0f3F19999A;
	@%p31 bra 	$L__BB0_47;
	bra.uni 	$L__BB0_46;

$L__BB0_47:
	mul.ftz.f32 	%f488, %f94, %f94;
	mov.f32 	%f489, 0fBD563CAE;
	mov.f32 	%f490, 0f3C80F082;
	fma.rn.ftz.f32 	%f491, %f490, %f488, %f489;
	mov.f32 	%f492, 0f3E085941;
	fma.rn.ftz.f32 	%f493, %f491, %f488, %f492;
	mov.f32 	%f494, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f495, %f493, %f488, %f494;
	mov.f32 	%f496, 0f00000000;
	fma.rn.ftz.f32 	%f497, %f495, %f488, %f496;
	fma.rn.ftz.f32 	%f850, %f497, %f94, %f94;
	bra.uni 	$L__BB0_48;

$L__BB0_46:
	mul.ftz.f32 	%f480, %f95, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f481, %f480;
	add.ftz.f32 	%f482, %f481, 0f3F800000;
	mov.f32 	%f483, 0f3F800000;
	rcp.approx.ftz.f32 	%f484, %f482;
	mov.f32 	%f485, 0fC0000000;
	fma.rn.ftz.f32 	%f486, %f484, %f485, %f483;
	setp.ge.ftz.f32 	%p32, %f95, 0f41102CB4;
	selp.f32 	%f487, 0f3F800000, %f486, %p32;
	mov.b32 	%r69, %f487;
	mov.b32 	%r70, %f94;
	and.b32  	%r71, %r70, -2147483648;
	or.b32  	%r72, %r71, %r69;
	mov.b32 	%f850, %r72;

$L__BB0_48:
	mul.ftz.f32 	%f498, %f17, %f850;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs110, %f498;}

	// end inline asm
	mov.b32 	%r73, %f9;
	mov.b32 	{%rs111, %rs42}, %r73;
	// begin inline asm
	{  cvt.f32.f16 %f499, %rs111;}

	// end inline asm
	mul.ftz.f32 	%f99, %f499, %f18;
	abs.ftz.f32 	%f100, %f99;
	setp.ltu.ftz.f32 	%p33, %f100, 0f3F19999A;
	@%p33 bra 	$L__BB0_50;
	bra.uni 	$L__BB0_49;

$L__BB0_50:
	mul.ftz.f32 	%f508, %f99, %f99;
	mov.f32 	%f509, 0fBD563CAE;
	mov.f32 	%f510, 0f3C80F082;
	fma.rn.ftz.f32 	%f511, %f510, %f508, %f509;
	mov.f32 	%f512, 0f3E085941;
	fma.rn.ftz.f32 	%f513, %f511, %f508, %f512;
	mov.f32 	%f514, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f515, %f513, %f508, %f514;
	mov.f32 	%f516, 0f00000000;
	fma.rn.ftz.f32 	%f517, %f515, %f508, %f516;
	fma.rn.ftz.f32 	%f851, %f517, %f99, %f99;
	bra.uni 	$L__BB0_51;

$L__BB0_49:
	mul.ftz.f32 	%f500, %f100, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f501, %f500;
	add.ftz.f32 	%f502, %f501, 0f3F800000;
	mov.f32 	%f503, 0f3F800000;
	rcp.approx.ftz.f32 	%f504, %f502;
	mov.f32 	%f505, 0fC0000000;
	fma.rn.ftz.f32 	%f506, %f504, %f505, %f503;
	setp.ge.ftz.f32 	%p34, %f100, 0f41102CB4;
	selp.f32 	%f507, 0f3F800000, %f506, %p34;
	mov.b32 	%r74, %f507;
	mov.b32 	%r75, %f99;
	and.b32  	%r76, %r75, -2147483648;
	or.b32  	%r77, %r76, %r74;
	mov.b32 	%f851, %r77;

$L__BB0_51:
	mul.ftz.f32 	%f518, %f17, %f851;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs112, %f518;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f519, %rs42;}

	// end inline asm
	mul.ftz.f32 	%f104, %f519, %f18;
	abs.ftz.f32 	%f105, %f104;
	setp.ltu.ftz.f32 	%p35, %f105, 0f3F19999A;
	@%p35 bra 	$L__BB0_53;
	bra.uni 	$L__BB0_52;

$L__BB0_53:
	mul.ftz.f32 	%f528, %f104, %f104;
	mov.f32 	%f529, 0fBD563CAE;
	mov.f32 	%f530, 0f3C80F082;
	fma.rn.ftz.f32 	%f531, %f530, %f528, %f529;
	mov.f32 	%f532, 0f3E085941;
	fma.rn.ftz.f32 	%f533, %f531, %f528, %f532;
	mov.f32 	%f534, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f535, %f533, %f528, %f534;
	mov.f32 	%f536, 0f00000000;
	fma.rn.ftz.f32 	%f537, %f535, %f528, %f536;
	fma.rn.ftz.f32 	%f852, %f537, %f104, %f104;
	bra.uni 	$L__BB0_54;

$L__BB0_52:
	mul.ftz.f32 	%f520, %f105, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f521, %f520;
	add.ftz.f32 	%f522, %f521, 0f3F800000;
	mov.f32 	%f523, 0f3F800000;
	rcp.approx.ftz.f32 	%f524, %f522;
	mov.f32 	%f525, 0fC0000000;
	fma.rn.ftz.f32 	%f526, %f524, %f525, %f523;
	setp.ge.ftz.f32 	%p36, %f105, 0f41102CB4;
	selp.f32 	%f527, 0f3F800000, %f526, %p36;
	mov.b32 	%r78, %f527;
	mov.b32 	%r79, %f104;
	and.b32  	%r80, %r79, -2147483648;
	or.b32  	%r81, %r80, %r78;
	mov.b32 	%f852, %r81;

$L__BB0_54:
	mul.ftz.f32 	%f538, %f17, %f852;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs114, %f538;}

	// end inline asm
	mov.b32 	%r82, %f10;
	mov.b32 	{%rs115, %rs47}, %r82;
	// begin inline asm
	{  cvt.f32.f16 %f539, %rs115;}

	// end inline asm
	mul.ftz.f32 	%f109, %f539, %f18;
	abs.ftz.f32 	%f110, %f109;
	setp.ltu.ftz.f32 	%p37, %f110, 0f3F19999A;
	@%p37 bra 	$L__BB0_56;
	bra.uni 	$L__BB0_55;

$L__BB0_56:
	mul.ftz.f32 	%f548, %f109, %f109;
	mov.f32 	%f549, 0fBD563CAE;
	mov.f32 	%f550, 0f3C80F082;
	fma.rn.ftz.f32 	%f551, %f550, %f548, %f549;
	mov.f32 	%f552, 0f3E085941;
	fma.rn.ftz.f32 	%f553, %f551, %f548, %f552;
	mov.f32 	%f554, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f555, %f553, %f548, %f554;
	mov.f32 	%f556, 0f00000000;
	fma.rn.ftz.f32 	%f557, %f555, %f548, %f556;
	fma.rn.ftz.f32 	%f853, %f557, %f109, %f109;
	bra.uni 	$L__BB0_57;

$L__BB0_55:
	mul.ftz.f32 	%f540, %f110, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f541, %f540;
	add.ftz.f32 	%f542, %f541, 0f3F800000;
	mov.f32 	%f543, 0f3F800000;
	rcp.approx.ftz.f32 	%f544, %f542;
	mov.f32 	%f545, 0fC0000000;
	fma.rn.ftz.f32 	%f546, %f544, %f545, %f543;
	setp.ge.ftz.f32 	%p38, %f110, 0f41102CB4;
	selp.f32 	%f547, 0f3F800000, %f546, %p38;
	mov.b32 	%r83, %f547;
	mov.b32 	%r84, %f109;
	and.b32  	%r85, %r84, -2147483648;
	or.b32  	%r86, %r85, %r83;
	mov.b32 	%f853, %r86;

$L__BB0_57:
	mul.ftz.f32 	%f558, %f17, %f853;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs116, %f558;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f559, %rs47;}

	// end inline asm
	mul.ftz.f32 	%f114, %f559, %f18;
	abs.ftz.f32 	%f115, %f114;
	setp.ltu.ftz.f32 	%p39, %f115, 0f3F19999A;
	@%p39 bra 	$L__BB0_59;
	bra.uni 	$L__BB0_58;

$L__BB0_59:
	mul.ftz.f32 	%f568, %f114, %f114;
	mov.f32 	%f569, 0fBD563CAE;
	mov.f32 	%f570, 0f3C80F082;
	fma.rn.ftz.f32 	%f571, %f570, %f568, %f569;
	mov.f32 	%f572, 0f3E085941;
	fma.rn.ftz.f32 	%f573, %f571, %f568, %f572;
	mov.f32 	%f574, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f575, %f573, %f568, %f574;
	mov.f32 	%f576, 0f00000000;
	fma.rn.ftz.f32 	%f577, %f575, %f568, %f576;
	fma.rn.ftz.f32 	%f854, %f577, %f114, %f114;
	bra.uni 	$L__BB0_60;

$L__BB0_58:
	mul.ftz.f32 	%f560, %f115, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f561, %f560;
	add.ftz.f32 	%f562, %f561, 0f3F800000;
	mov.f32 	%f563, 0f3F800000;
	rcp.approx.ftz.f32 	%f564, %f562;
	mov.f32 	%f565, 0fC0000000;
	fma.rn.ftz.f32 	%f566, %f564, %f565, %f563;
	setp.ge.ftz.f32 	%p40, %f115, 0f41102CB4;
	selp.f32 	%f567, 0f3F800000, %f566, %p40;
	mov.b32 	%r87, %f567;
	mov.b32 	%r88, %f114;
	and.b32  	%r89, %r88, -2147483648;
	or.b32  	%r90, %r89, %r87;
	mov.b32 	%f854, %r90;

$L__BB0_60:
	mul.ftz.f32 	%f578, %f17, %f854;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs118, %f578;}

	// end inline asm
	mov.b32 	%r91, %f11;
	mov.b32 	{%rs119, %rs52}, %r91;
	// begin inline asm
	{  cvt.f32.f16 %f579, %rs119;}

	// end inline asm
	mul.ftz.f32 	%f119, %f579, %f18;
	abs.ftz.f32 	%f120, %f119;
	setp.ltu.ftz.f32 	%p41, %f120, 0f3F19999A;
	@%p41 bra 	$L__BB0_62;
	bra.uni 	$L__BB0_61;

$L__BB0_62:
	mul.ftz.f32 	%f588, %f119, %f119;
	mov.f32 	%f589, 0fBD563CAE;
	mov.f32 	%f590, 0f3C80F082;
	fma.rn.ftz.f32 	%f591, %f590, %f588, %f589;
	mov.f32 	%f592, 0f3E085941;
	fma.rn.ftz.f32 	%f593, %f591, %f588, %f592;
	mov.f32 	%f594, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f595, %f593, %f588, %f594;
	mov.f32 	%f596, 0f00000000;
	fma.rn.ftz.f32 	%f597, %f595, %f588, %f596;
	fma.rn.ftz.f32 	%f855, %f597, %f119, %f119;
	bra.uni 	$L__BB0_63;

$L__BB0_61:
	mul.ftz.f32 	%f580, %f120, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f581, %f580;
	add.ftz.f32 	%f582, %f581, 0f3F800000;
	mov.f32 	%f583, 0f3F800000;
	rcp.approx.ftz.f32 	%f584, %f582;
	mov.f32 	%f585, 0fC0000000;
	fma.rn.ftz.f32 	%f586, %f584, %f585, %f583;
	setp.ge.ftz.f32 	%p42, %f120, 0f41102CB4;
	selp.f32 	%f587, 0f3F800000, %f586, %p42;
	mov.b32 	%r92, %f587;
	mov.b32 	%r93, %f119;
	and.b32  	%r94, %r93, -2147483648;
	or.b32  	%r95, %r94, %r92;
	mov.b32 	%f855, %r95;

$L__BB0_63:
	mul.ftz.f32 	%f598, %f17, %f855;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs120, %f598;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f599, %rs52;}

	// end inline asm
	mul.ftz.f32 	%f124, %f599, %f18;
	abs.ftz.f32 	%f125, %f124;
	setp.ltu.ftz.f32 	%p43, %f125, 0f3F19999A;
	@%p43 bra 	$L__BB0_65;
	bra.uni 	$L__BB0_64;

$L__BB0_65:
	mul.ftz.f32 	%f608, %f124, %f124;
	mov.f32 	%f609, 0fBD563CAE;
	mov.f32 	%f610, 0f3C80F082;
	fma.rn.ftz.f32 	%f611, %f610, %f608, %f609;
	mov.f32 	%f612, 0f3E085941;
	fma.rn.ftz.f32 	%f613, %f611, %f608, %f612;
	mov.f32 	%f614, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f615, %f613, %f608, %f614;
	mov.f32 	%f616, 0f00000000;
	fma.rn.ftz.f32 	%f617, %f615, %f608, %f616;
	fma.rn.ftz.f32 	%f856, %f617, %f124, %f124;
	bra.uni 	$L__BB0_66;

$L__BB0_64:
	mul.ftz.f32 	%f600, %f125, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f601, %f600;
	add.ftz.f32 	%f602, %f601, 0f3F800000;
	mov.f32 	%f603, 0f3F800000;
	rcp.approx.ftz.f32 	%f604, %f602;
	mov.f32 	%f605, 0fC0000000;
	fma.rn.ftz.f32 	%f606, %f604, %f605, %f603;
	setp.ge.ftz.f32 	%p44, %f125, 0f41102CB4;
	selp.f32 	%f607, 0f3F800000, %f606, %p44;
	mov.b32 	%r96, %f607;
	mov.b32 	%r97, %f124;
	and.b32  	%r98, %r97, -2147483648;
	or.b32  	%r99, %r98, %r96;
	mov.b32 	%f856, %r99;

$L__BB0_66:
	mul.ftz.f32 	%f618, %f17, %f856;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs122, %f618;}

	// end inline asm
	mov.b32 	%r100, %f12;
	mov.b32 	{%rs123, %rs57}, %r100;
	// begin inline asm
	{  cvt.f32.f16 %f619, %rs123;}

	// end inline asm
	mul.ftz.f32 	%f129, %f619, %f18;
	abs.ftz.f32 	%f130, %f129;
	setp.ltu.ftz.f32 	%p45, %f130, 0f3F19999A;
	@%p45 bra 	$L__BB0_68;
	bra.uni 	$L__BB0_67;

$L__BB0_68:
	mul.ftz.f32 	%f628, %f129, %f129;
	mov.f32 	%f629, 0fBD563CAE;
	mov.f32 	%f630, 0f3C80F082;
	fma.rn.ftz.f32 	%f631, %f630, %f628, %f629;
	mov.f32 	%f632, 0f3E085941;
	fma.rn.ftz.f32 	%f633, %f631, %f628, %f632;
	mov.f32 	%f634, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f635, %f633, %f628, %f634;
	mov.f32 	%f636, 0f00000000;
	fma.rn.ftz.f32 	%f637, %f635, %f628, %f636;
	fma.rn.ftz.f32 	%f857, %f637, %f129, %f129;
	bra.uni 	$L__BB0_69;

$L__BB0_67:
	mul.ftz.f32 	%f620, %f130, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f621, %f620;
	add.ftz.f32 	%f622, %f621, 0f3F800000;
	mov.f32 	%f623, 0f3F800000;
	rcp.approx.ftz.f32 	%f624, %f622;
	mov.f32 	%f625, 0fC0000000;
	fma.rn.ftz.f32 	%f626, %f624, %f625, %f623;
	setp.ge.ftz.f32 	%p46, %f130, 0f41102CB4;
	selp.f32 	%f627, 0f3F800000, %f626, %p46;
	mov.b32 	%r101, %f627;
	mov.b32 	%r102, %f129;
	and.b32  	%r103, %r102, -2147483648;
	or.b32  	%r104, %r103, %r101;
	mov.b32 	%f857, %r104;

$L__BB0_69:
	mul.ftz.f32 	%f638, %f17, %f857;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs124, %f638;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f639, %rs57;}

	// end inline asm
	mul.ftz.f32 	%f134, %f639, %f18;
	abs.ftz.f32 	%f135, %f134;
	setp.ltu.ftz.f32 	%p47, %f135, 0f3F19999A;
	@%p47 bra 	$L__BB0_71;
	bra.uni 	$L__BB0_70;

$L__BB0_71:
	mul.ftz.f32 	%f648, %f134, %f134;
	mov.f32 	%f649, 0fBD563CAE;
	mov.f32 	%f650, 0f3C80F082;
	fma.rn.ftz.f32 	%f651, %f650, %f648, %f649;
	mov.f32 	%f652, 0f3E085941;
	fma.rn.ftz.f32 	%f653, %f651, %f648, %f652;
	mov.f32 	%f654, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f655, %f653, %f648, %f654;
	mov.f32 	%f656, 0f00000000;
	fma.rn.ftz.f32 	%f657, %f655, %f648, %f656;
	fma.rn.ftz.f32 	%f858, %f657, %f134, %f134;
	bra.uni 	$L__BB0_72;

$L__BB0_70:
	mul.ftz.f32 	%f640, %f135, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f641, %f640;
	add.ftz.f32 	%f642, %f641, 0f3F800000;
	mov.f32 	%f643, 0f3F800000;
	rcp.approx.ftz.f32 	%f644, %f642;
	mov.f32 	%f645, 0fC0000000;
	fma.rn.ftz.f32 	%f646, %f644, %f645, %f643;
	setp.ge.ftz.f32 	%p48, %f135, 0f41102CB4;
	selp.f32 	%f647, 0f3F800000, %f646, %p48;
	mov.b32 	%r105, %f647;
	mov.b32 	%r106, %f134;
	and.b32  	%r107, %r106, -2147483648;
	or.b32  	%r108, %r107, %r105;
	mov.b32 	%f858, %r108;

$L__BB0_72:
	mul.ftz.f32 	%f658, %f17, %f858;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs126, %f658;}

	// end inline asm
	mov.b32 	%r109, %f13;
	mov.b32 	{%rs127, %rs62}, %r109;
	// begin inline asm
	{  cvt.f32.f16 %f659, %rs127;}

	// end inline asm
	mul.ftz.f32 	%f139, %f659, %f18;
	abs.ftz.f32 	%f140, %f139;
	setp.ltu.ftz.f32 	%p49, %f140, 0f3F19999A;
	@%p49 bra 	$L__BB0_74;
	bra.uni 	$L__BB0_73;

$L__BB0_74:
	mul.ftz.f32 	%f668, %f139, %f139;
	mov.f32 	%f669, 0fBD563CAE;
	mov.f32 	%f670, 0f3C80F082;
	fma.rn.ftz.f32 	%f671, %f670, %f668, %f669;
	mov.f32 	%f672, 0f3E085941;
	fma.rn.ftz.f32 	%f673, %f671, %f668, %f672;
	mov.f32 	%f674, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f675, %f673, %f668, %f674;
	mov.f32 	%f676, 0f00000000;
	fma.rn.ftz.f32 	%f677, %f675, %f668, %f676;
	fma.rn.ftz.f32 	%f859, %f677, %f139, %f139;
	bra.uni 	$L__BB0_75;

$L__BB0_73:
	mul.ftz.f32 	%f660, %f140, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f661, %f660;
	add.ftz.f32 	%f662, %f661, 0f3F800000;
	mov.f32 	%f663, 0f3F800000;
	rcp.approx.ftz.f32 	%f664, %f662;
	mov.f32 	%f665, 0fC0000000;
	fma.rn.ftz.f32 	%f666, %f664, %f665, %f663;
	setp.ge.ftz.f32 	%p50, %f140, 0f41102CB4;
	selp.f32 	%f667, 0f3F800000, %f666, %p50;
	mov.b32 	%r110, %f667;
	mov.b32 	%r111, %f139;
	and.b32  	%r112, %r111, -2147483648;
	or.b32  	%r113, %r112, %r110;
	mov.b32 	%f859, %r113;

$L__BB0_75:
	mul.ftz.f32 	%f678, %f17, %f859;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs128, %f678;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f679, %rs62;}

	// end inline asm
	mul.ftz.f32 	%f144, %f679, %f18;
	abs.ftz.f32 	%f145, %f144;
	setp.ltu.ftz.f32 	%p51, %f145, 0f3F19999A;
	@%p51 bra 	$L__BB0_77;
	bra.uni 	$L__BB0_76;

$L__BB0_77:
	mul.ftz.f32 	%f688, %f144, %f144;
	mov.f32 	%f689, 0fBD563CAE;
	mov.f32 	%f690, 0f3C80F082;
	fma.rn.ftz.f32 	%f691, %f690, %f688, %f689;
	mov.f32 	%f692, 0f3E085941;
	fma.rn.ftz.f32 	%f693, %f691, %f688, %f692;
	mov.f32 	%f694, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f695, %f693, %f688, %f694;
	mov.f32 	%f696, 0f00000000;
	fma.rn.ftz.f32 	%f697, %f695, %f688, %f696;
	fma.rn.ftz.f32 	%f860, %f697, %f144, %f144;
	bra.uni 	$L__BB0_78;

$L__BB0_76:
	mul.ftz.f32 	%f680, %f145, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f681, %f680;
	add.ftz.f32 	%f682, %f681, 0f3F800000;
	mov.f32 	%f683, 0f3F800000;
	rcp.approx.ftz.f32 	%f684, %f682;
	mov.f32 	%f685, 0fC0000000;
	fma.rn.ftz.f32 	%f686, %f684, %f685, %f683;
	setp.ge.ftz.f32 	%p52, %f145, 0f41102CB4;
	selp.f32 	%f687, 0f3F800000, %f686, %p52;
	mov.b32 	%r114, %f687;
	mov.b32 	%r115, %f144;
	and.b32  	%r116, %r115, -2147483648;
	or.b32  	%r117, %r116, %r114;
	mov.b32 	%f860, %r117;

$L__BB0_78:
	mul.ftz.f32 	%f698, %f17, %f860;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs130, %f698;}

	// end inline asm
	mov.b32 	%r118, %f14;
	mov.b32 	{%rs131, %rs67}, %r118;
	// begin inline asm
	{  cvt.f32.f16 %f699, %rs131;}

	// end inline asm
	mul.ftz.f32 	%f149, %f699, %f18;
	abs.ftz.f32 	%f150, %f149;
	setp.ltu.ftz.f32 	%p53, %f150, 0f3F19999A;
	@%p53 bra 	$L__BB0_80;
	bra.uni 	$L__BB0_79;

$L__BB0_80:
	mul.ftz.f32 	%f708, %f149, %f149;
	mov.f32 	%f709, 0fBD563CAE;
	mov.f32 	%f710, 0f3C80F082;
	fma.rn.ftz.f32 	%f711, %f710, %f708, %f709;
	mov.f32 	%f712, 0f3E085941;
	fma.rn.ftz.f32 	%f713, %f711, %f708, %f712;
	mov.f32 	%f714, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f715, %f713, %f708, %f714;
	mov.f32 	%f716, 0f00000000;
	fma.rn.ftz.f32 	%f717, %f715, %f708, %f716;
	fma.rn.ftz.f32 	%f861, %f717, %f149, %f149;
	bra.uni 	$L__BB0_81;

$L__BB0_79:
	mul.ftz.f32 	%f700, %f150, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f701, %f700;
	add.ftz.f32 	%f702, %f701, 0f3F800000;
	mov.f32 	%f703, 0f3F800000;
	rcp.approx.ftz.f32 	%f704, %f702;
	mov.f32 	%f705, 0fC0000000;
	fma.rn.ftz.f32 	%f706, %f704, %f705, %f703;
	setp.ge.ftz.f32 	%p54, %f150, 0f41102CB4;
	selp.f32 	%f707, 0f3F800000, %f706, %p54;
	mov.b32 	%r119, %f707;
	mov.b32 	%r120, %f149;
	and.b32  	%r121, %r120, -2147483648;
	or.b32  	%r122, %r121, %r119;
	mov.b32 	%f861, %r122;

$L__BB0_81:
	mul.ftz.f32 	%f718, %f17, %f861;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs132, %f718;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f719, %rs67;}

	// end inline asm
	mul.ftz.f32 	%f154, %f719, %f18;
	abs.ftz.f32 	%f155, %f154;
	setp.ltu.ftz.f32 	%p55, %f155, 0f3F19999A;
	@%p55 bra 	$L__BB0_83;
	bra.uni 	$L__BB0_82;

$L__BB0_83:
	mul.ftz.f32 	%f728, %f154, %f154;
	mov.f32 	%f729, 0fBD563CAE;
	mov.f32 	%f730, 0f3C80F082;
	fma.rn.ftz.f32 	%f731, %f730, %f728, %f729;
	mov.f32 	%f732, 0f3E085941;
	fma.rn.ftz.f32 	%f733, %f731, %f728, %f732;
	mov.f32 	%f734, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f735, %f733, %f728, %f734;
	mov.f32 	%f736, 0f00000000;
	fma.rn.ftz.f32 	%f737, %f735, %f728, %f736;
	fma.rn.ftz.f32 	%f862, %f737, %f154, %f154;
	bra.uni 	$L__BB0_84;

$L__BB0_82:
	mul.ftz.f32 	%f720, %f155, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f721, %f720;
	add.ftz.f32 	%f722, %f721, 0f3F800000;
	mov.f32 	%f723, 0f3F800000;
	rcp.approx.ftz.f32 	%f724, %f722;
	mov.f32 	%f725, 0fC0000000;
	fma.rn.ftz.f32 	%f726, %f724, %f725, %f723;
	setp.ge.ftz.f32 	%p56, %f155, 0f41102CB4;
	selp.f32 	%f727, 0f3F800000, %f726, %p56;
	mov.b32 	%r123, %f727;
	mov.b32 	%r124, %f154;
	and.b32  	%r125, %r124, -2147483648;
	or.b32  	%r126, %r125, %r123;
	mov.b32 	%f862, %r126;

$L__BB0_84:
	mul.ftz.f32 	%f738, %f17, %f862;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs134, %f738;}

	// end inline asm
	mov.b32 	%r127, %f15;
	mov.b32 	{%rs135, %rs72}, %r127;
	// begin inline asm
	{  cvt.f32.f16 %f739, %rs135;}

	// end inline asm
	mul.ftz.f32 	%f159, %f739, %f18;
	abs.ftz.f32 	%f160, %f159;
	setp.ltu.ftz.f32 	%p57, %f160, 0f3F19999A;
	@%p57 bra 	$L__BB0_86;
	bra.uni 	$L__BB0_85;

$L__BB0_86:
	mul.ftz.f32 	%f748, %f159, %f159;
	mov.f32 	%f749, 0fBD563CAE;
	mov.f32 	%f750, 0f3C80F082;
	fma.rn.ftz.f32 	%f751, %f750, %f748, %f749;
	mov.f32 	%f752, 0f3E085941;
	fma.rn.ftz.f32 	%f753, %f751, %f748, %f752;
	mov.f32 	%f754, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f755, %f753, %f748, %f754;
	mov.f32 	%f756, 0f00000000;
	fma.rn.ftz.f32 	%f757, %f755, %f748, %f756;
	fma.rn.ftz.f32 	%f863, %f757, %f159, %f159;
	bra.uni 	$L__BB0_87;

$L__BB0_85:
	mul.ftz.f32 	%f740, %f160, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f741, %f740;
	add.ftz.f32 	%f742, %f741, 0f3F800000;
	mov.f32 	%f743, 0f3F800000;
	rcp.approx.ftz.f32 	%f744, %f742;
	mov.f32 	%f745, 0fC0000000;
	fma.rn.ftz.f32 	%f746, %f744, %f745, %f743;
	setp.ge.ftz.f32 	%p58, %f160, 0f41102CB4;
	selp.f32 	%f747, 0f3F800000, %f746, %p58;
	mov.b32 	%r128, %f747;
	mov.b32 	%r129, %f159;
	and.b32  	%r130, %r129, -2147483648;
	or.b32  	%r131, %r130, %r128;
	mov.b32 	%f863, %r131;

$L__BB0_87:
	mul.ftz.f32 	%f758, %f17, %f863;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs136, %f758;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f759, %rs72;}

	// end inline asm
	mul.ftz.f32 	%f164, %f759, %f18;
	abs.ftz.f32 	%f165, %f164;
	setp.ltu.ftz.f32 	%p59, %f165, 0f3F19999A;
	@%p59 bra 	$L__BB0_89;
	bra.uni 	$L__BB0_88;

$L__BB0_89:
	mul.ftz.f32 	%f768, %f164, %f164;
	mov.f32 	%f769, 0fBD563CAE;
	mov.f32 	%f770, 0f3C80F082;
	fma.rn.ftz.f32 	%f771, %f770, %f768, %f769;
	mov.f32 	%f772, 0f3E085941;
	fma.rn.ftz.f32 	%f773, %f771, %f768, %f772;
	mov.f32 	%f774, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f775, %f773, %f768, %f774;
	mov.f32 	%f776, 0f00000000;
	fma.rn.ftz.f32 	%f777, %f775, %f768, %f776;
	fma.rn.ftz.f32 	%f864, %f777, %f164, %f164;
	bra.uni 	$L__BB0_90;

$L__BB0_88:
	mul.ftz.f32 	%f760, %f165, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f761, %f760;
	add.ftz.f32 	%f762, %f761, 0f3F800000;
	mov.f32 	%f763, 0f3F800000;
	rcp.approx.ftz.f32 	%f764, %f762;
	mov.f32 	%f765, 0fC0000000;
	fma.rn.ftz.f32 	%f766, %f764, %f765, %f763;
	setp.ge.ftz.f32 	%p60, %f165, 0f41102CB4;
	selp.f32 	%f767, 0f3F800000, %f766, %p60;
	mov.b32 	%r132, %f767;
	mov.b32 	%r133, %f164;
	and.b32  	%r134, %r133, -2147483648;
	or.b32  	%r135, %r134, %r132;
	mov.b32 	%f864, %r135;

$L__BB0_90:
	mul.ftz.f32 	%f778, %f17, %f864;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs138, %f778;}

	// end inline asm
	mov.b32 	%r136, %f16;
	mov.b32 	{%rs139, %rs77}, %r136;
	// begin inline asm
	{  cvt.f32.f16 %f779, %rs139;}

	// end inline asm
	mul.ftz.f32 	%f169, %f779, %f18;
	abs.ftz.f32 	%f170, %f169;
	setp.ltu.ftz.f32 	%p61, %f170, 0f3F19999A;
	@%p61 bra 	$L__BB0_92;
	bra.uni 	$L__BB0_91;

$L__BB0_92:
	mul.ftz.f32 	%f788, %f169, %f169;
	mov.f32 	%f789, 0fBD563CAE;
	mov.f32 	%f790, 0f3C80F082;
	fma.rn.ftz.f32 	%f791, %f790, %f788, %f789;
	mov.f32 	%f792, 0f3E085941;
	fma.rn.ftz.f32 	%f793, %f791, %f788, %f792;
	mov.f32 	%f794, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f795, %f793, %f788, %f794;
	mov.f32 	%f796, 0f00000000;
	fma.rn.ftz.f32 	%f797, %f795, %f788, %f796;
	fma.rn.ftz.f32 	%f865, %f797, %f169, %f169;
	bra.uni 	$L__BB0_93;

$L__BB0_91:
	mul.ftz.f32 	%f780, %f170, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f781, %f780;
	add.ftz.f32 	%f782, %f781, 0f3F800000;
	mov.f32 	%f783, 0f3F800000;
	rcp.approx.ftz.f32 	%f784, %f782;
	mov.f32 	%f785, 0fC0000000;
	fma.rn.ftz.f32 	%f786, %f784, %f785, %f783;
	setp.ge.ftz.f32 	%p62, %f170, 0f41102CB4;
	selp.f32 	%f787, 0f3F800000, %f786, %p62;
	mov.b32 	%r137, %f787;
	mov.b32 	%r138, %f169;
	and.b32  	%r139, %r138, -2147483648;
	or.b32  	%r140, %r139, %r137;
	mov.b32 	%f865, %r140;

$L__BB0_93:
	mul.ftz.f32 	%f798, %f17, %f865;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs140, %f798;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f799, %rs77;}

	// end inline asm
	mul.ftz.f32 	%f174, %f799, %f18;
	abs.ftz.f32 	%f175, %f174;
	setp.ltu.ftz.f32 	%p63, %f175, 0f3F19999A;
	@%p63 bra 	$L__BB0_95;
	bra.uni 	$L__BB0_94;

$L__BB0_95:
	mul.ftz.f32 	%f808, %f174, %f174;
	mov.f32 	%f809, 0fBD563CAE;
	mov.f32 	%f810, 0f3C80F082;
	fma.rn.ftz.f32 	%f811, %f810, %f808, %f809;
	mov.f32 	%f812, 0f3E085941;
	fma.rn.ftz.f32 	%f813, %f811, %f808, %f812;
	mov.f32 	%f814, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f815, %f813, %f808, %f814;
	mov.f32 	%f816, 0f00000000;
	fma.rn.ftz.f32 	%f817, %f815, %f808, %f816;
	fma.rn.ftz.f32 	%f866, %f817, %f174, %f174;
	bra.uni 	$L__BB0_96;

$L__BB0_94:
	mul.ftz.f32 	%f800, %f175, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f801, %f800;
	add.ftz.f32 	%f802, %f801, 0f3F800000;
	mov.f32 	%f803, 0f3F800000;
	rcp.approx.ftz.f32 	%f804, %f802;
	mov.f32 	%f805, 0fC0000000;
	fma.rn.ftz.f32 	%f806, %f804, %f805, %f803;
	setp.ge.ftz.f32 	%p64, %f175, 0f41102CB4;
	selp.f32 	%f807, 0f3F800000, %f806, %p64;
	mov.b32 	%r141, %f807;
	mov.b32 	%r142, %f174;
	and.b32  	%r143, %r142, -2147483648;
	or.b32  	%r144, %r143, %r141;
	mov.b32 	%f866, %r144;

$L__BB0_96:
	mul.ftz.f32 	%f818, %f17, %f866;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs142, %f818;}

	// end inline asm
	mov.b32 	%r145, {%rs140, %rs142};
	mov.b32 	%r146, {%rs80, %rs82};
	mov.b32 	%r147, {%rs84, %rs86};
	mov.b32 	%r148, {%rs88, %rs90};
	mov.b32 	%r149, {%rs92, %rs94};
	mov.b32 	%r150, {%rs96, %rs98};
	mov.b32 	%r151, {%rs100, %rs102};
	mov.b32 	%r152, {%rs104, %rs106};
	mov.b32 	%r153, {%rs108, %rs110};
	mov.b32 	%r154, {%rs112, %rs114};
	mov.b32 	%r155, {%rs116, %rs118};
	mov.b32 	%r156, {%rs120, %rs122};
	mov.b32 	%r157, {%rs124, %rs126};
	mov.b32 	%r158, {%rs128, %rs130};
	mov.b32 	%r159, {%rs132, %rs134};
	mov.b32 	%r160, {%rs136, %rs138};
	mov.b32 	%f819, %r145;
	mov.b32 	%f820, %r160;
	mov.b32 	%f821, %r159;
	mov.b32 	%f822, %r158;
	mov.b32 	%f823, %r157;
	mov.b32 	%f824, %r156;
	mov.b32 	%f825, %r155;
	mov.b32 	%f826, %r154;
	mov.b32 	%f827, %r153;
	mov.b32 	%f828, %r152;
	mov.b32 	%f829, %r151;
	mov.b32 	%f830, %r150;
	mov.b32 	%f831, %r149;
	mov.b32 	%f832, %r148;
	mov.b32 	%f833, %r147;
	mov.b32 	%f834, %r146;
	st.param.f32 	[func_retval0+0], %f834;
	st.param.f32 	[func_retval0+4], %f833;
	st.param.f32 	[func_retval0+8], %f832;
	st.param.f32 	[func_retval0+12], %f831;
	st.param.f32 	[func_retval0+16], %f830;
	st.param.f32 	[func_retval0+20], %f829;
	st.param.f32 	[func_retval0+24], %f828;
	st.param.f32 	[func_retval0+28], %f827;
	st.param.f32 	[func_retval0+32], %f826;
	st.param.f32 	[func_retval0+36], %f825;
	st.param.f32 	[func_retval0+40], %f824;
	st.param.f32 	[func_retval0+44], %f823;
	st.param.f32 	[func_retval0+48], %f822;
	st.param.f32 	[func_retval0+52], %f821;
	st.param.f32 	[func_retval0+56], %f820;
	st.param.f32 	[func_retval0+60], %f819;
	ret;

}