_retval0[32]) activation_8(
	.param .align 4 .b8 activation_8_param_0[32]
)
{
.pragma "abi_param_reg all";
	.reg .pred 	%p<17>;
	.reg .b16 	%rs<71>;
	.reg .f32 	%f<180>;
	.reg .b32 	%r<17>;


	ld.param.f32 	%f1, [activation_8_param_0];
	mov.b32 	%r1, %f1;
	ld.param.f32 	%f8, [activation_8_param_0+28];
	ld.param.f32 	%f7, [activation_8_param_0+24];
	ld.param.f32 	%f6, [activation_8_param_0+20];
	ld.param.f32 	%f5, [activation_8_param_0+16];
	ld.param.f32 	%f4, [activation_8_param_0+12];
	ld.param.f32 	%f3, [activation_8_param_0+8];
	ld.param.f32 	%f2, [activation_8_param_0+4];
	ld.const.f32 	%f76, [params+4];
	ld.const.f32 	%f9, [params];
	mul.ftz.f32 	%f10, %f76, %f9;
	mov.b32 	{%rs39, %rs2}, %r1;
	// begin inline asm
	{  cvt.f32.f16 %f75, %rs39;}

	// end inline asm
	setp.gt.ftz.f32 	%p1, %f75, 0f00000000;
	@%p1 bra 	$L__BB0_2;
	bra.uni 	$L__BB0_1;

$L__BB0_2:
	mul.ftz.f32 	%f164, %f75, %f9;
	bra.uni 	$L__BB0_3;

$L__BB0_1:
	mul.ftz.f32 	%f77, %f75, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f78, %f77;
	add.ftz.f32 	%f79, %f78, 0fBF800000;
	mul.ftz.f32 	%f164, %f10, %f79;

$L__BB0_3:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs40, %f164;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f81, %rs2;}

	// end inline asm
	setp.gt.ftz.f32 	%p2, %f81, 0f00000000;
	@%p2 bra 	$L__BB0_5;
	bra.uni 	$L__BB0_4;

$L__BB0_5:
	mul.ftz.f32 	%f165, %f81, %f9;
	bra.uni 	$L__BB0_6;

$L__BB0_4:
	mul.ftz.f32 	%f82, %f81, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f83, %f82;
	add.ftz.f32 	%f84, %f83, 0fBF800000;
	mul.ftz.f32 	%f165, %f10, %f84;

$L__BB0_6:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs42, %f165;}

	// end inline asm
	mov.b32 	%r2, %f2;
	mov.b32 	{%rs43, %rs7}, %r2;
	// begin inline asm
	{  cvt.f32.f16 %f86, %rs43;}

	// end inline asm
	setp.gt.ftz.f32 	%p3, %f86, 0f00000000;
	@%p3 bra 	$L__BB0_8;
	bra.uni 	$L__BB0_7;

$L__BB0_8:
	mul.ftz.f32 	%f166, %f86, %f9;
	bra.uni 	$L__BB0_9;

$L__BB0_7:
	mul.ftz.f32 	%f87, %f86, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f88, %f87;
	add.ftz.f32 	%f89, %f88, 0fBF800000;
	mul.ftz.f32 	%f166, %f10, %f89;

$L__BB0_9:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs44, %f166;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f91, %rs7;}

	// end inline asm
	setp.gt.ftz.f32 	%p4, %f91, 0f00000000;
	@%p4 bra 	$L__BB0_11;
	bra.uni 	$L__BB0_10;

$L__BB0_11:
	mul.ftz.f32 	%f167, %f91, %f9;
	bra.uni 	$L__BB0_12;

$L__BB0_10:
	mul.ftz.f32 	%f92, %f91, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f93, %f92;
	add.ftz.f32 	%f94, %f93, 0fBF800000;
	mul.ftz.f32 	%f167, %f10, %f94;

$L__BB0_12:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs46, %f167;}

	// end inline asm
	mov.b32 	%r3, %f3;
	mov.b32 	{%rs47, %rs12}, %r3;
	// begin inline asm
	{  cvt.f32.f16 %f96, %rs47;}

	// end inline asm
	setp.gt.ftz.f32 	%p5, %f96, 0f00000000;
	@%p5 bra 	$L__BB0_14;
	bra.uni 	$L__BB0_13;

$L__BB0_14:
	mul.ftz.f32 	%f168, %f96, %f9;
	bra.uni 	$L__BB0_15;

$L__BB0_13:
	mul.ftz.f32 	%f97, %f96, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f98, %f97;
	add.ftz.f32 	%f99, %f98, 0fBF800000;
	mul.ftz.f32 	%f168, %f10, %f99;

$L__BB0_15:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs48, %f168;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f101, %rs12;}

	// end inline asm
	setp.gt.ftz.f32 	%p6, %f101, 0f00000000;
	@%p6 bra 	$L__BB0_17;
	bra.uni 	$L__BB0_16;

$L__BB0_17:
	mul.ftz.f32 	%f169, %f101, %f9;
	bra.uni 	$L__BB0_18;

$L__BB0_16:
	mul.ftz.f32 	%f102, %f101, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f103, %f102;
	add.ftz.f32 	%f104, %f103, 0fBF800000;
	mul.ftz.f32 	%f169, %f10, %f104;

$L__BB0_18:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs50, %f169;}

	// end inline asm
	mov.b32 	%r4, %f4;
	mov.b32 	{%rs51, %rs17}, %r4;
	// begin inline asm
	{  cvt.f32.f16 %f106, %rs51;}

	// end inline asm
	setp.gt.ftz.f32 	%p7, %f106, 0f00000000;
	@%p7 bra 	$L__BB0_20;
	bra.uni 	$L__BB0_19;

$L__BB0_20:
	mul.ftz.f32 	%f170, %f106, %f9;
	bra.uni 	$L__BB0_21;

$L__BB0_19:
	mul.ftz.f32 	%f107, %f106, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f108, %f107;
	add.ftz.f32 	%f109, %f108, 0fBF800000;
	mul.ftz.f32 	%f170, %f10, %f109;

$L__BB0_21:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs52, %f170;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f111, %rs17;}

	// end inline asm
	setp.gt.ftz.f32 	%p8, %f111, 0f00000000;
	@%p8 bra 	$L__BB0_23;
	bra.uni 	$L__BB0_22;

$L__BB0_23:
	mul.ftz.f32 	%f171, %f111, %f9;
	bra.uni 	$L__BB0_24;

$L__BB0_22:
	mul.ftz.f32 	%f112, %f111, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f113, %f112;
	add.ftz.f32 	%f114, %f113, 0fBF800000;
	mul.ftz.f32 	%f171, %f10, %f114;

$L__BB0_24:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs54, %f171;}

	// end inline asm
	mov.b32 	%r5, %f5;
	mov.b32 	{%rs55, %rs22}, %r5;
	// begin inline asm
	{  cvt.f32.f16 %f116, %rs55;}

	// end inline asm
	setp.gt.ftz.f32 	%p9, %f116, 0f00000000;
	@%p9 bra 	$L__BB0_26;
	bra.uni 	$L__BB0_25;

$L__BB0_26:
	mul.ftz.f32 	%f172, %f116, %f9;
	bra.uni 	$L__BB0_27;

$L__BB0_25:
	mul.ftz.f32 	%f117, %f116, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f118, %f117;
	add.ftz.f32 	%f119, %f118, 0fBF800000;
	mul.ftz.f32 	%f172, %f10, %f119;

$L__BB0_27:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs56, %f172;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f121, %rs22;}

	// end inline asm
	setp.gt.ftz.f32 	%p10, %f121, 0f00000000;
	@%p10 bra 	$L__BB0_29;
	bra.uni 	$L__BB0_28;

$L__BB0_29:
	mul.ftz.f32 	%f173, %f121, %f9;
	bra.uni 	$L__BB0_30;

$L__BB0_28:
	mul.ftz.f32 	%f122, %f121, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f123, %f122;
	add.ftz.f32 	%f124, %f123, 0fBF800000;
	mul.ftz.f32 	%f173, %f10, %f124;

$L__BB0_30:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs58, %f173;}

	// end inline asm
	mov.b32 	%r6, %f6;
	mov.b32 	{%rs59, %rs27}, %r6;
	// begin inline asm
	{  cvt.f32.f16 %f126, %rs59;}

	// end inline asm
	setp.gt.ftz.f32 	%p11, %f126, 0f00000000;
	@%p11 bra 	$L__BB0_32;
	bra.uni 	$L__BB0_31;

$L__BB0_32:
	mul.ftz.f32 	%f174, %f126, %f9;
	bra.uni 	$L__BB0_33;

$L__BB0_31:
	mul.ftz.f32 	%f127, %f126, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f128, %f127;
	add.ftz.f32 	%f129, %f128, 0fBF800000;
	mul.ftz.f32 	%f174, %f10, %f129;

$L__BB0_33:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs60, %f174;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f131, %rs27;}

	// end inline asm
	setp.gt.ftz.f32 	%p12, %f131, 0f00000000;
	@%p12 bra 	$L__BB0_35;
	bra.uni 	$L__BB0_34;

$L__BB0_35:
	mul.ftz.f32 	%f175, %f131, %f9;
	bra.uni 	$L__BB0_36;

$L__BB0_34:
	mul.ftz.f32 	%f132, %f131, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f133, %f132;
	add.ftz.f32 	%f134, %f133, 0fBF800000;
	mul.ftz.f32 	%f175, %f10, %f134;

$L__BB0_36:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs62, %f175;}

	// end inline asm
	mov.b32 	%r7, %f7;
	mov.b32 	{%rs63, %rs32}, %r7;
	// begin inline asm
	{  cvt.f32.f16 %f136, %rs63;}

	// end inline asm
	setp.gt.ftz.f32 	%p13, %f136, 0f00000000;
	@%p13 bra 	$L__BB0_38;
	bra.uni 	$L__BB0_37;

$L__BB0_38:
	mul.ftz.f32 	%f176, %f136, %f9;
	bra.uni 	$L__BB0_39;

$L__BB0_37:
	mul.ftz.f32 	%f137, %f136, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f138, %f137;
	add.ftz.f32 	%f139, %f138, 0fBF800000;
	mul.ftz.f32 	%f176, %f10, %f139;

$L__BB0_39:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs64, %f176;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f141, %rs32;}

	// end inline asm
	setp.gt.ftz.f32 	%p14, %f141, 0f00000000;
	@%p14 bra 	$L__BB0_41;
	bra.uni 	$L__BB0_40;

$L__BB0_41:
	mul.ftz.f32 	%f177, %f141, %f9;
	bra.uni 	$L__BB0_42;

$L__BB0_40:
	mul.ftz.f32 	%f142, %f141, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f143, %f142;
	add.ftz.f32 	%f144, %f143, 0fBF800000;
	mul.ftz.f32 	%f177, %f10, %f144;

$L__BB0_42:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs66, %f177;}

	// end inline asm
	mov.b32 	%r8, %f8;
	mov.b32 	{%rs67, %rs37}, %r8;
	// begin inline asm
	{  cvt.f32.f16 %f146, %rs67;}

	// end inline asm
	setp.gt.ftz.f32 	%p15, %f146, 0f00000000;
	@%p15 bra 	$L__BB0_44;
	bra.uni 	$L__BB0_43;

$L__BB0_44:
	mul.ftz.f32 	%f178, %f146, %f9;
	bra.uni 	$L__BB0_45;

$L__BB0_43:
	mul.ftz.f32 	%f147, %f146, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f148, %f147;
	add.ftz.f32 	%f149, %f148, 0fBF800000;
	mul.ftz.f32 	%f178, %f10, %f149;

$L__BB0_45:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs68, %f178;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f151, %rs37;}

	// end inline asm
	setp.gt.ftz.f32 	%p16, %f151, 0f00000000;
	@%p16 bra 	$L__BB0_47;
	bra.uni 	$L__BB0_46;

$L__BB0_47:
	mul.ftz.f32 	%f179, %f151, %f9;
	bra.uni 	$L__BB0_48;

$L__BB0_46:
	mul.ftz.f32 	%f152, %f151, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f153, %f152;
	add.ftz.f32 	%f154, %f153, 0fBF800000;
	mul.ftz.f32 	%f179, %f10, %f154;

$L__BB0_48:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs70, %f179;}

	// end inline asm
	mov.b32 	%r9, {%rs68, %rs70};
	mov.b32 	%r10, {%rs40, %rs42};
	mov.b32 	%r11, {%rs44, %rs46};
	mov.b32 	%r12, {%rs48, %rs50};
	mov.b32 	%r13, {%rs52, %rs54};
	mov.b32 	%r14, {%rs56, %rs58};
	mov.b32 	%r15, {%rs60, %rs62};
	mov.b32 	%r16, {%rs64, %rs66};
	mov.b32 	%f156, %r9;
	mov.b32 	%f157, %r16;
	mov.b32 	%f158, %r15;
	mov.b32 	%f159, %r14;
	mov.b32 	%f160, %r13;
	mov.b32 	%f161, %r12;
	mov.b32 	%f162, %r11;
	mov.b32 	%f163, %r10;
	st.param.f32 	[func_retval0+0], %f163;
	st.param.f32 	[func_retval0+4], %f162;
	st.param.f32 	[func_retval0+8], %f161;
	st.param.f32 	[func_retval0+12], %f160;
	st.param.f32 	[func_retval0+16], %f159;
	st.param.f32 	[func_retval0+20], %f158;
	st.param.f32 	[func_retval0+24], %f157;
	st.param.f32 	[func_retval0+28], %f156;
	ret;

}