NVVM 7.0.1 // .version 7.8 .target sm_80 .address_size 64 // .globl activation_4 .visible .const .align 4 .b8 params[8]; .visible .func (.param .align 4 .b8 func_retval0[16]) activation_4( .param .align 4 .b8 activation_4_param_0[16] ) { .pragma "abi_param_reg all"; .reg .pred %p<9>; .reg .f32 %f<101>; .reg .b32 %r<17>; ld.param.f32 %f4, [activation_4_param_0+12]; ld.param.f32 %f3, [activation_4_param_0+8]; ld.param.f32 %f2, [activation_4_param_0+4]; ld.param.f32 %f5, [activation_4_param_0]; abs.ftz.f32 %f6, %f5; setp.ltu.ftz.f32 %p1, %f6, 0f3F19999A; @%p1 bra $L__BB0_2; bra.uni $L__BB0_1; $L__BB0_2: mul.ftz.f32 %f33, %f5, %f5; mov.f32 %f34, 0fBD563CAE; mov.f32 %f35, 0f3C80F082; fma.rn.ftz.f32 %f36, %f35, %f33, %f34; mov.f32 %f37, 0f3E085941; fma.rn.ftz.f32 %f38, %f36, %f33, %f37; mov.f32 %f39, 0fBEAAA9ED; fma.rn.ftz.f32 %f40, %f38, %f33, %f39; mov.f32 %f41, 0f00000000; fma.rn.ftz.f32 %f42, %f40, %f33, %f41; fma.rn.ftz.f32 %f97, %f42, %f5, %f5; bra.uni $L__BB0_3; $L__BB0_1: mul.ftz.f32 %f25, %f6, 0f4038AA3B; ex2.approx.ftz.f32 %f26, %f25; add.ftz.f32 %f27, %f26, 0f3F800000; mov.f32 %f28, 0f3F800000; rcp.approx.ftz.f32 %f29, %f27; mov.f32 %f30, 0fC0000000; fma.rn.ftz.f32 %f31, %f29, %f30, %f28; setp.ge.ftz.f32 %p2, %f6, 0f41102CB4; selp.f32 %f32, 0f3F800000, %f31, %p2; mov.b32 %r1, %f32; mov.b32 %r2, %f5; and.b32 %r3, %r2, -2147483648; or.b32 %r4, %r3, %r1; mov.b32 %f97, %r4; $L__BB0_3: abs.ftz.f32 %f11, %f2; setp.ltu.ftz.f32 %p3, %f11, 0f3F19999A; @%p3 bra $L__BB0_5; bra.uni $L__BB0_4; $L__BB0_5: mul.ftz.f32 %f51, %f2, %f2; mov.f32 %f52, 0fBD563CAE; mov.f32 %f53, 0f3C80F082; fma.rn.ftz.f32 %f54, %f53, %f51, %f52; mov.f32 %f55, 0f3E085941; fma.rn.ftz.f32 %f56, %f54, %f51, %f55; mov.f32 %f57, 0fBEAAA9ED; fma.rn.ftz.f32 %f58, %f56, %f51, %f57; mov.f32 %f59, 0f00000000; fma.rn.ftz.f32 %f60, %f58, %f51, %f59; fma.rn.ftz.f32 %f98, %f60, %f2, %f2; bra.uni $L__BB0_6; $L__BB0_4: mul.ftz.f32 %f43, %f11, 0f4038AA3B; ex2.approx.ftz.f32 %f44, %f43; add.ftz.f32 %f45, %f44, 0f3F800000; mov.f32 %f46, 0f3F800000; rcp.approx.ftz.f32 %f47, %f45; mov.f32 %f48, 0fC0000000; fma.rn.ftz.f32 %f49, %f47, %f48, %f46; setp.ge.ftz.f32 %p4, %f11, 0f41102CB4; selp.f32 %f50, 0f3F800000, %f49, %p4; mov.b32 %r5, %f50; mov.b32 %r6, %f2; and.b32 %r7, %r6, -2147483648; or.b32 %r8, %r7, %r5; mov.b32 %f98, %r8; $L__BB0_6: abs.ftz.f32 %f16, %f3; setp.ltu.ftz.f32 %p5, %f16, 0f3F19999A; @%p5 bra $L__BB0_8; bra.uni $L__BB0_7; $L__BB0_8: mul.ftz.f32 %f69, %f3, %f3; mov.f32 %f70, 0fBD563CAE; mov.f32 %f71, 0f3C80F082; fma.rn.ftz.f32 %f72, %f71, %f69, %f70; mov.f32 %f73, 0f3E085941; fma.rn.ftz.f32 %f74, %f72, %f69, %f73; mov.f32 %f75, 0fBEAAA9ED; fma.rn.ftz.f32 %f76, %f74, %f69, %f75; mov.f32 %f77, 0f00000000; fma.rn.ftz.f32 %f78, %f76, %f69, %f77; fma.rn.ftz.f32 %f99, %f78, %f3, %f3; bra.uni $L__BB0_9; $L__BB0_7: mul.ftz.f32 %f61, %f16, 0f4038AA3B; ex2.approx.ftz.f32 %f62, %f61; add.ftz.f32 %f63, %f62, 0f3F800000; mov.f32 %f64, 0f3F800000; rcp.approx.ftz.f32 %f65, %f63; mov.f32 %f66, 0fC0000000; fma.rn.ftz.f32 %f67, %f65, %f66, %f64; setp.ge.ftz.f32 %p6, %f16, 0f41102CB4; selp.f32 %f68, 0f3F800000, %f67, %p6; mov.b32 %r9, %f68; mov.b32 %r10, %f3; and.b32 %r11, %r10, -2147483648; or.b32 %r12, %r11, %r9; mov.b32 %f99, %r12; $L__BB0_9: abs.ftz.f32 %f21, %f4; setp.ltu.ftz.f32 %p7, %f21, 0f3F19999A; @%p7 bra $L__BB0_11; bra.uni $L__BB0_10; $L__BB0_11: mul.ftz.f32 %f87, %f4, %f4; mov.f32 %f88, 0fBD563CAE; mov.f32 %f89, 0f3C80F082; fma.rn.ftz.f32 %f90, %f89, %f87, %f88; mov.f32 %f91, 0f3E085941; fma.rn.ftz.f32 %f92, %f90, %f87, %f91; mov.f32 %f93, 0fBEAAA9ED; fma.rn.ftz.f32 %f94, %f92, %f87, %f93; mov.f32 %f95, 0f00000000; fma.rn.ftz.f32 %f96, %f94, %f87, %f95; fma.rn.ftz.f32 %f100, %f96, %f4, %f4; bra.uni $L__BB0_12; $L__BB0_10: mul.ftz.f32 %f79, %f21, 0f4038AA3B; ex2.approx.ftz.f32 %f80, %f79; add.ftz.f32 %f81, %f80, 0f3F800000; mov.f32 %f82, 0f3F800000; rcp.approx.ftz.f32 %f83, %f81; mov.f32 %f84, 0fC0000000; fma.rn.ftz.f32 %f85, %f83, %f84, %f82; setp.ge.ftz.f32 %p8, %f21, 0f41102CB4; selp.f32 %f86, 0f3F800000, %f85, %p8; mov.b32 %r13, %f86; mov.b32 %r14, %f4; and.b32 %r15, %r14, -2147483648; or.b32 %r16, %r15, %r13; mov.b32 %f100, %r16; $L__BB0_12: st.param.f32 [func_retval0+0], %f97; st.param.f32 [func_retval0+4], %f98; st.param.f32 [func_retval0+8], %f99; st.param.f32 [func_retval0+12], %f100; ret; }