.param.f32 	%f7, [activation_8_param_0+24];
	ld.param.f32 	%f6, [activation_8_param_0+20];
	ld.param.f32 	%f5, [activation_8_param_0+16];
	ld.param.f32 	%f4, [activation_8_param_0+12];
	ld.param.f32 	%f3, [activation_8_param_0+8];
	ld.param.f32 	%f2, [activation_8_param_0+4];
	mov.b32 	{%rs39, %rs2}, %r1;
	// begin inline asm
	{  cvt.f32.f16 %f91, %rs39;}

	// end inline asm
	ld.const.f32 	%f9, [params];
	ld.const.f32 	%f10, [params+4];
	mul.ftz.f32 	%f11, %f91, %f10;
	abs.ftz.f32 	%f12, %f11;
	setp.ltu.ftz.f32 	%p1, %f12, 0f3F19999A;
	@%p1 bra 	$L__BB0_2;
	bra.uni 	$L__BB0_1;

$L__BB0_2:
	mul.ftz.f32 	%f100, %f11, %f11;
	mov.f32 	%f101, 0fBD563CAE;
	mov.f32 	%f102, 0f3C80F082;
	fma.rn.ftz.f32 	%f103, %f102, %f100, %f101;
	mov.f32 	%f104, 0f3E085941;
	fma.rn.ftz.f32 	%f105, %f103, %f100, %f104;
	mov.f32 	%f106, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f107, %f105, %f100, %f106;
	mov.f32 	%f108, 0f00000000;
	fma.rn.ftz.f32 	%f109, %f107, %f100, %f108;
	fma.rn.ftz.f32 	%f419, %f109, %f11, %f11;
	bra.uni 	$L__BB0_3;

$L__BB0_1:
	mul.ftz.f32 	%f92, %f12, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f93, %f92;
	add.ftz.f32 	%f94, %f93, 0f3F800000;
	mov.f32 	%f95, 0f3F800000;
	rcp.approx.ftz.f32 	%f96, %f94;
	mov.f32 	%f97, 0fC0000000;
	fma.rn.ftz.f32 	%f98, %f96, %f97, %f95;
	setp.ge.ftz.f32 	%p2, %f12, 0f41102CB4;
	selp.f32 	%f99, 0f3F800000, %f98, %p2;
	mov.b32 	%r2, %f99;
	mov.b32 	%r3, %f11;
	and.b32  	%r4, %r3, -2147483648;
	or.b32  	%r5, %r4, %r2;
	mov.b32 	%f419, %r5;

$L__BB0_3:
	mul.ftz.f32 	%f110, %f9, %f419;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs40, %f110;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f111, %rs2;}

	// end inline asm
	mul.ftz.f32 	%f16, %f111, %f10;
	abs.ftz.f32 	%f17, %f16;
	setp.ltu.ftz.f32 	%p3, %f17, 0f3F19999A;
	@%p3 bra 	$L__BB0_5;
	bra.uni 	$L__BB0_4;

$L__BB0_5:
	mul.ftz.f32 	%f120, %f16, %f16;
	mov.f32 	%f121, 0fBD563CAE;
	mov.f32 	%f122, 0f3C80F082;
	fma.rn.ftz.f32 	%f123, %f122, %f120, %f121;
	mov.f32 	%f124, 0f3E085941;
	fma.rn.ftz.f32 	%f125, %f123, %f120, %f124;
	mov.f32 	%f126, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f127, %f125, %f120, %f126;
	mov.f32 	%f128, 0f00000000;
	fma.rn.ftz.f32 	%f129, %f127, %f120, %f128;
	fma.rn.ftz.f32 	%f420, %f129, %f16, %f16;
	bra.uni 	$L__BB0_6;

$L__BB0_4:
	mul.ftz.f32 	%f112, %f17, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f113, %f112;
	add.ftz.f32 	%f114, %f113, 0f3F800000;
	mov.f32 	%f115, 0f3F800000;
	rcp.approx.ftz.f32 	%f116, %f114;
	mov.f32 	%f117, 0fC0000000;
	fma.rn.ftz.f32 	%f118, %f116, %f117, %f115;
	setp.ge.ftz.f32 	%p4, %f17, 0f41102CB4;
	selp.f32 	%f119, 0f3F800000, %f118, %p4;
	mov.b32 	%r6, %f119;
	mov.b32 	%r7, %f16;
	and.b32  	%r8, %r7, -2147483648;
	or.b32  	%r9, %r8, %r6;
	mov.b32 	%f420, %r9;

$L__BB0_6:
	mul.ftz.f32 	%f130, %f9, %f420;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs42, %f130;}

	// end inline asm
	mov.b32 	%r10, %f2;
	mov.b32 	{%rs43, %rs7}, %r10;
	// begin inline asm
	{  cvt.f32.f16 %f131, %rs43;}

	// end inline asm
	mul.ftz.f32 	%f21, %f131, %f10;
	abs.ftz.f32 	%f22, %f21;
	setp.ltu.ftz.f32 	%p5, %f22, 0f3F19999A;
	@%p5 bra 	$L__BB0_8;
	bra.uni 	$L__BB0_7;

$L__BB0_8:
	mul.ftz.f32 	%f140, %f21, %f21;
	mov.f32 	%f141, 0fBD563CAE;
	mov.f32 	%f142, 0f3C80F082;
	fma.rn.ftz.f32 	%f143, %f142, %f140, %f141;
	mov.f32 	%f144, 0f3E085941;
	fma.rn.ftz.f32 	%f145, %f143, %f140, %f144;
	mov.f32 	%f146, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f147, %f145, %f140, %f146;
	mov.f32 	%f148, 0f00000000;
	fma.rn.ftz.f32 	%f149, %f147, %f140, %f148;
	fma.rn.ftz.f32 	%f421, %f149, %f21, %f21;
	bra.uni 	$L__BB0_9;

$L__BB0_7:
	mul.ftz.f32 	%f132, %f22, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f133, %f132;
	add.ftz.f32 	%f134, %f133, 0f3F800000;
	mov.f32 	%f135, 0f3F800000;
	rcp.approx.ftz.f32 	%f136, %f134;
	mov.f32 	%f137, 0fC0000000;
	fma.rn.ftz.f32 	%f138, %f136, %f137, %f135;
	setp.ge.ftz.f32 	%p6, %f22, 0f41102CB4;
	selp.f32 	%f139, 0f3F800000, %f138, %p6;
	mov.b32 	%r11, %f139;
	mov.b32 	%r12, %f21;
	and.b32  	%r13, %r12, -2147483648;
	or.b32  	%r14, %r13, %r11;
	mov.b32 	%f421, %r14;

$L__BB0_9:
	mul.ftz.f32 	%f150, %f9, %f421;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs44, %f150;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f151, %rs7;}

	// end inline asm
	mul.ftz.f32 	%f26, %f151, %f10;
	abs.ftz.f32 	%f27, %f26;
	setp.ltu.ftz.f32 	%p7, %f27, 0f3F19999A;
	@%p7 bra 	$L__BB0_11;
	bra.uni 	$L__BB0_10;

$L__BB0_11:
	mul.ftz.f32 	%f160, %f26, %f26;
	mov.f32 	%f161, 0fBD563CAE;
	mov.f32 	%f162, 0f3C80F082;
	fma.rn.ftz.f32 	%f163, %f162, %f160, %f161;
	mov.f32 	%f164, 0f3E085941;
	fma.rn.ftz.f32 	%f165, %f163, %f160, %f164;
	mov.f32 	%f166, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f167, %f165, %f160, %f166;
	mov.f32 	%f168, 0f00000000;
	fma.rn.ftz.f32 	%f169, %f167, %f160, %f168;
	fma.rn.ftz.f32 	%f422, %f169, %f26, %f26;
	bra.uni 	$L__BB0_12;

$L__BB0_10:
	mul.ftz.f32 	%f152, %f27, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f153, %f152;
	add.ftz.f32 	%f154, %f153, 0f3F800000;
	mov.f32 	%f155, 0f3F800000;
	rcp.approx.ftz.f32 	%f156, %f154;
	mov.f32 	%f157, 0fC0000000;
	fma.rn.ftz.f32 	%f158, %f156, %f157, %f155;
	setp.ge.ftz.f32 	%p8, %f27, 0f41102CB4;
	selp.f32 	%f159, 0f3F800000, %f158, %p8;
	mov.b32 	%r15, %f159;
	mov.b32 	%r16, %f26;
	and.b32  	%r17, %r16, -2147483648;
	or.b32  	%r18, %r17, %r15;
	mov.b32 	%f422, %r18;

$L__BB0_12:
	mul.ftz.f32 	%f170, %f9, %f422;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs46, %f170;}

	// end inline asm
	mov.b32 	%r19, %f3;
	mov.b32 	{%rs47, %rs12}, %r19;
	// begin inline asm
	{  cvt.f32.f16 %f171, %rs47;}

	// end inline asm
	mul.ftz.f32 	%f31, %f171, %f10;
	abs.ftz.f32 	%f32, %f31;
	setp.ltu.ftz.f32 	%p9, %f32, 0f3F19999A;
	@%p9 bra 	$L__BB0_14;
	bra.uni 	$L__BB0_13;

$L__BB0_14:
	mul.ftz.f32 	%f180, %f31, %f31;
	mov.f32 	%f181, 0fBD563CAE;
	mov.f32 	%f182, 0f3C80F082;
	fma.rn.ftz.f32 	%f183, %f182, %f180, %f181;
	mov.f32 	%f184, 0f3E085941;
	fma.rn.ftz.f32 	%f185, %f183, %f180, %f184;
	mov.f32 	%f186, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f187, %f185, %f180, %f186;
	mov.f32 	%f188, 0f00000000;
	fma.rn.ftz.f32 	%f189, %f187, %f180, %f188;
	fma.rn.ftz.f32 	%f423, %f189, %f31, %f31;
	bra.uni 	$L__BB0_15;

$L__BB0_13:
	mul.ftz.f32 	%f172, %f32, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f173, %f172;
	add.ftz.f32 	%f174, %f173, 0f3F800000;
	mov.f32 	%f175, 0f3F800000;
	rcp.approx.ftz.f32 	%f176, %f174;
	mov.f32 	%f177, 0fC0000000;
	fma.rn.ftz.f32 	%f178, %f176, %f177, %f175;
	setp.ge.ftz.f32 	%p10, %f32, 0f41102CB4;
	selp.f32 	%f179, 0f3F800000, %f178, %p10;
	mov.b32 	%r20, %f179;
	mov.b32 	%r21, %f31;
	and.b32  	%r22, %r21, -2147483648;
	or.b32  	%r23, %r22, %r20;
	mov.b32 	%f423, %r23;

$L__BB0_15:
	mul.ftz.f32 	%f190, %f9, %f423;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs48, %f190;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f191, %rs12;}

	// end inline asm
	mul.ftz.f32 	%f36, %f191, %f10;
	abs.ftz.f32 	%f37, %f36;
	setp.ltu.ftz.f32 	%p11, %f37, 0f3F19999A;
	@%p11 bra 	$L__BB0_17;
	bra.uni 	$L__BB0_16;

$L__BB0_17:
	mul.ftz.f32 	%f200, %f36, %f36;
	mov.f32 	%f201, 0fBD563CAE;
	mov.f32 	%f202, 0f3C80F082;
	fma.rn.ftz.f32 	%f203, %f202, %f200, %f201;
	mov.f32 	%f204, 0f3E085941;
	fma.rn.ftz.f32 	%f205, %f203, %f200, %f204;
	mov.f32 	%f206, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f207, %f205, %f200, %f206;
	mov.f32 	%f208, 0f00000000;
	fma.rn.ftz.f32 	%f209, %f207, %f200, %f208;
	fma.rn.ftz.f32 	%f424, %f209, %f36, %f36;
	bra.uni 	$L__BB0_18;

$L__BB0_16:
	mul.ftz.f32 	%f192, %f37, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f193, %f192;
	add.ftz.f32 	%f194, %f193, 0f3F800000;
	mov.f32 	%f195, 0f3F800000;
	rcp.approx.ftz.f32 	%f196, %f194;
	mov.f32 	%f197, 0fC0000000;
	fma.rn.ftz.f32 	%f198, %f196, %f197, %f195;
	setp.ge.ftz.f32 	%p12, %f37, 0f41102CB4;
	selp.f32 	%f199, 0f3F800000, %f198, %p12;
	mov.b32 	%r24, %f199;
	mov.b32 	%r25, %f36;
	and.b32  	%r26, %r25, -2147483648;
	or.b32  	%r27, %r26, %r24;
	mov.b32 	%f424, %r27;

$L__BB0_18:
	mul.ftz.f32 	%f210, %f9, %f424;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs50, %f210;}

	// end inline asm
	mov.b32 	%r28, %f4;
	mov.b32 	{%rs51, %rs17}, %r28;
	// begin inline asm
	{  cvt.f32.f16 %f211, %rs51;}

	// end inline asm
	mul.ftz.f32 	%f41, %f211, %f10;
	abs.ftz.f32 	%f42, %f41;
	setp.ltu.ftz.f32 	%p13, %f42, 0f3F19999A;
	@%p13 bra 	$L__BB0_20;
	bra.uni 	$L__BB0_19;

$L__BB0_20:
	mul.ftz.f32 	%f220, %f41, %f41;
	mov.f32 	%f221, 0fBD563CAE;
	mov.f32 	%f222, 0f3C80F082;
	fma.rn.ftz.f32 	%f223, %f222, %f220, %f221;
	mov.f32 	%f224, 0f3E085941;
	fma.rn.ftz.f32 	%f225, %f223, %f220, %f224;
	mov.f32 	%f226, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f227, %f225, %f220, %f226;
	mov.f32 	%f228, 0f00000000;
	fma.rn.ftz.f32 	%f229, %f227, %f220, %f228;
	fma.rn.ftz.f32 	%f425, %f229, %f41, %f41;
	bra.uni 	$L__BB0_21;

$L__BB0_19:
	mul.ftz.f32 	%f212, %f42, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f213, %f212;
	add.ftz.f32 	%f214, %f213, 0f3F800000;
	mov.f32 	%f215, 0f3F800000;
	rcp.approx.ftz.f32 	%f216, %f214;
	mov.f32 	%f217, 0fC0000000;
	fma.rn.ftz.f32 	%f218, %f216, %f217, %f215;
	setp.ge.ftz.f32 	%p14, %f42, 0f41102CB4;
	selp.f32 	%f219, 0f3F800000, %f218, %p14;
	mov.b32 	%r29, %f219;
	mov.b32 	%r30, %f41;
	and.b32  	%r31, %r30, -2147483648;
	or.b32  	%r32, %r31, %r29;
	mov.b32 	%f425, %r32;

$L__BB0_21:
	mul.ftz.f32 	%f230, %f9, %f425;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs52, %f230;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f231, %rs17;}

	// end inline asm
	mul.ftz.f32 	%f46, %f231, %f10;
	abs.ftz.f32 	%f47, %f46;
	setp.ltu.ftz.f32 	%p15, %f47, 0f3F19999A;
	@%p15 bra 	$L__BB0_23;
	bra.uni 	$L__BB0_22;

$L__BB0_23:
	mul.ftz.f32 	%f240, %f46, %f46;
	mov.f32 	%f241, 0fBD563CAE;
	mov.f32 	%f242, 0f3C80F082;
	fma.rn.ftz.f32 	%f243, %f242, %f240, %f241;
	mov.f32 	%f244, 0f3E085941;
	fma.rn.ftz.f32 	%f245, %f243, %f240, %f244;
	mov.f32 	%f246, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f247, %f245, %f240, %f246;
	mov.f32 	%f248, 0f00000000;
	fma.rn.ftz.f32 	%f249, %f247, %f240, %f248;
	fma.rn.ftz.f32 	%f426, %f249, %f46, %f46;
	bra.uni 	$L__BB0_24;

$L__BB0_22:
	mul.ftz.f32 	%f232, %f47, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f233, %f232;
	add.ftz.f32 	%f234, %f233, 0f3F800000;
	mov.f32 	%f235, 0f3F800000;
	rcp.approx.ftz.f32 	%f236, %f234;
	mov.f32 	%f237, 0fC0000000;
	fma.rn.ftz.f32 	%f238, %f236, %f237, %f235;
	setp.ge.ftz.f32 	%p16, %f47, 0f41102CB4;
	selp.f32 	%f239, 0f3F800000, %f238, %p16;
	mov.b32 	%r33, %f239;
	mov.b32 	%r34, %f46;
	and.b32  	%r35, %r34, -2147483648;
	or.b32  	%r36, %r35, %r33;
	mov.b32 	%f426, %r36;

$L__BB0_24:
	mul.ftz.f32 	%f250, %f9, %f426;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs54, %f250;}

	// end inline asm
	mov.b32 	%r37, %f5;
	mov.b32 	{%rs55, %rs22}, %r37;
	// begin inline asm
	{  cvt.f32.f16 %f251, %rs55;}

	// end inline asm
	mul.ftz.f32 	%f51, %f251, %f10;
	abs.ftz.f32 	%f52, %f51;
	setp.ltu.ftz.f32 	%p17, %f52, 0f3F19999A;
	@%p17 bra 	$L__BB0_26;
	bra.uni 	$L__BB0_25;

$L__BB0_26:
	mul.ftz.f32 	%f260, %f51, %f51;
	mov.f32 	%f261, 0fBD563CAE;
	mov.f32 	%f262, 0f3C80F082;
	fma.rn.ftz.f32 	%f263, %f262, %f260, %f261;
	mov.f32 	%f264, 0f3E085941;
	fma.rn.ftz.f32 	%f265, %f263, %f260, %f264;
	mov.f32 	%f266, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f267, %f265, %f260, %f266;
	mov.f32 	%f268, 0f00000000;
	fma.rn.ftz.f32 	%f269, %f267, %f260, %f268;
	fma.rn.ftz.f32 	%f427, %f269, %f51, %f51;
	bra.uni 	$L__BB0_27;

$L__BB0_25:
	mul.ftz.f32 	%f252, %f52, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f253, %f252;
	add.ftz.f32 	%f254, %f253, 0f3F800000;
	mov.f32 	%f255, 0f3F800000;
	rcp.approx.ftz.f32 	%f256, %f254;
	mov.f32 	%f257, 0fC0000000;
	fma.rn.ftz.f32 	%f258, %f256, %f257, %f255;
	setp.ge.ftz.f32 	%p18, %f52, 0f41102CB4;
	selp.f32 	%f259, 0f3F800000, %f258, %p18;
	mov.b32 	%r38, %f259;
	mov.b32 	%r39, %f51;
	and.b32  	%r40, %r39, -2147483648;
	or.b32  	%r41, %r40, %r38;
	mov.b32 	%f427, %r41;

$L__BB0_27:
	mul.ftz.f32 	%f270, %f9, %f427;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs56, %f270;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f271, %rs22;}

	// end inline asm
	mul.ftz.f32 	%f56, %f271, %f10;
	abs.ftz.f32 	%f57, %f56;
	setp.ltu.ftz.f32 	%p19, %f57, 0f3F19999A;
	@%p19 bra 	$L__BB0_29;
	bra.uni 	$L__BB0_28;

$L__BB0_29:
	mul.ftz.f32 	%f280, %f56, %f56;
	mov.f32 	%f281, 0fBD563CAE;
	mov.f32 	%f282, 0f3C80F082;
	fma.rn.ftz.f32 	%f283, %f282, %f280, %f281;
	mov.f32 	%f284, 0f3E085941;
	fma.rn.ftz.f32 	%f285, %f283, %f280, %f284;
	mov.f32 	%f286, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f287, %f285, %f280, %f286;
	mov.f32 	%f288, 0f00000000;
	fma.rn.ftz.f32 	%f289, %f287, %f280, %f288;
	fma.rn.ftz.f32 	%f428, %f289, %f56, %f56;
	bra.uni 	$L__BB0_30;

$L__BB0_28:
	mul.ftz.f32 	%f272, %f57, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f273, %f272;
	add.ftz.f32 	%f274, %f273, 0f3F800000;
	mov.f32 	%f275, 0f3F800000;
	rcp.approx.ftz.f32 	%f276, %f274;
	mov.f32 	%f277, 0fC0000000;
	fma.rn.ftz.f32 	%f278, %f276, %f277, %f275;
	setp.ge.ftz.f32 	%p20, %f57, 0f41102CB4;
	selp.f32 	%f279, 0f3F800000, %f278, %p20;
	mov.b32 	%r42, %f279;
	mov.b32 	%r43, %f56;
	and.b32  	%r44, %r43, -2147483648;
	or.b32  	%r45, %r44, %r42;
	mov.b32 	%f428, %r45;

$L__BB0_30:
	mul.ftz.f32 	%f290, %f9, %f428;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs58, %f290;}

	// end inline asm
	mov.b32 	%r46, %f6;
	mov.b32 	{%rs59, %rs27}, %r46;
	// begin inline asm
	{  cvt.f32.f16 %f291, %rs59;}

	// end inline asm
	mul.ftz.f32 	%f61, %f291, %f10;
	abs.ftz.f32 	%f62, %f61;
	setp.ltu.ftz.f32 	%p21, %f62, 0f3F19999A;
	@%p21 bra 	$L__BB0_32;
	bra.uni 	$L__BB0_31;

$L__BB0_32:
	mul.ftz.f32 	%f300, %f61, %f61;
	mov.f32 	%f301, 0fBD563CAE;
	mov.f32 	%f302, 0f3C80F082;
	fma.rn.ftz.f32 	%f303, %f302, %f300, %f301;
	mov.f32 	%f304, 0f3E085941;
	fma.rn.ftz.f32 	%f305, %f303, %f300, %f304;
	mov.f32 	%f306, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f307, %f305, %f300, %f306;
	mov.f32 	%f308, 0f00000000;
	fma.rn.ftz.f32 	%f309, %f307, %f300, %f308;
	fma.rn.ftz.f32 	%f429, %f309, %f61, %f61;
	bra.uni 	$L__BB0_33;

$L__BB0_31:
	mul.ftz.f32 	%f292, %f62, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f293, %f292;
	add.ftz.f32 	%f294, %f293, 0f3F800000;
	mov.f32 	%f295, 0f3F800000;
	rcp.approx.ftz.f32 	%f296, %f294;
	mov.f32 	%f297, 0fC0000000;
	fma.rn.ftz.f32 	%f298, %f296, %f297, %f295;
	setp.ge.ftz.f32 	%p22, %f62, 0f41102CB4;
	selp.f32 	%f299, 0f3F800000, %f298, %p22;
	mov.b32 	%r47, %f299;
	mov.b32 	%r48, %f61;
	and.b32  	%r49, %r48, -2147483648;
	or.b32  	%r50, %r49, %r47;
	mov.b32 	%f429, %r50;

$L__BB0_33:
	mul.ftz.f32 	%f310, %f9, %f429;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs60, %f310;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f311, %rs27;}

	// end inline asm
	mul.ftz.f32 	%f66, %f311, %f10;
	abs.ftz.f32 	%f67, %f66;
	setp.ltu.ftz.f32 	%p23, %f67, 0f3F19999A;
	@%p23 bra 	$L__BB0_35;
	bra.uni 	$L__BB0_34;

$L__BB0_35:
	mul.ftz.f32 	%f320, %f66, %f66;
	mov.f32 	%f321, 0fBD563CAE;
	mov.f32 	%f322, 0f3C80F082;
	fma.rn.ftz.f32 	%f323, %f322, %f320, %f321;
	mov.f32 	%f324, 0f3E085941;
	fma.rn.ftz.f32 	%f325, %f323, %f320, %f324;
	mov.f32 	%f326, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f327, %f325, %f320, %f326;
	mov.f32 	%f328, 0f00000000;
	fma.rn.ftz.f32 	%f329, %f327, %f320, %f328;
	fma.rn.ftz.f32 	%f430, %f329, %f66, %f66;
	bra.uni 	$L__BB0_36;

$L__BB0_34:
	mul.ftz.f32 	%f312, %f67, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f313, %f312;
	add.ftz.f32 	%f314, %f313, 0f3F800000;
	mov.f32 	%f315, 0f3F800000;
	rcp.approx.ftz.f32 	%f316, %f314;
	mov.f32 	%f317, 0fC0000000;
	fma.rn.ftz.f32 	%f318, %f316, %f317, %f315;
	setp.ge.ftz.f32 	%p24, %f67, 0f41102CB4;
	selp.f32 	%f319, 0f3F800000, %f318, %p24;
	mov.b32 	%r51, %f319;
	mov.b32 	%r52, %f66;
	and.b32  	%r53, %r52, -2147483648;
	or.b32  	%r54, %r53, %r51;
	mov.b32 	%f430, %r54;

$L__BB0_36:
	mul.ftz.f32 	%f330, %f9, %f430;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs62, %f330;}

	// end inline asm
	mov.b32 	%r55, %f7;
	mov.b32 	{%rs63, %rs32}, %r55;
	// begin inline asm
	{  cvt.f32.f16 %f331, %rs63;}

	// end inline asm
	mul.ftz.f32 	%f71, %f331, %f10;
	abs.ftz.f32 	%f72, %f71;
	setp.ltu.ftz.f32 	%p25, %f72, 0f3F19999A;
	@%p25 bra 	$L__BB0_38;
	bra.uni 	$L__BB0_37;

$L__BB0_38:
	mul.ftz.f32 	%f340, %f71, %f71;
	mov.f32 	%f341, 0fBD563CAE;
	mov.f32 	%f342, 0f3C80F082;
	fma.rn.ftz.f32 	%f343, %f342, %f340, %f341;
	mov.f32 	%f344, 0f3E085941;
	fma.rn.ftz.f32 	%f345, %f343, %f340, %f344;
	mov.f32 	%f346, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f347, %f345, %f340, %f346;
	mov.f32 	%f348, 0f00000000;
	fma.rn.ftz.f32 	%f349, %f347, %f340, %f348;
	fma.rn.ftz.f32 	%f431, %f349, %f71, %f71;
	bra.uni 	$L__BB0_39;

$L__BB0_37:
	mul.ftz.f32 	%f332, %f72, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f333, %f332;
	add.ftz.f32 	%f334, %f333, 0f3F800000;
	mov.f32 	%f335, 0f3F800000;
	rcp.approx.ftz.f32 	%f336, %f334;
	mov.f32 	%f337, 0fC0000000;
	fma.rn.ftz.f32 	%f338, %f336, %f337, %f335;
	setp.ge.ftz.f32 	%p26, %f72, 0f41102CB4;
	selp.f32 	%f339, 0f3F800000, %f338, %p26;
	mov.b32 	%r56, %f339;
	mov.b32 	%r57, %f71;
	and.b32  	%r58, %r57, -2147483648;
	or.b32  	%r59, %r58, %r56;
	mov.b32 	%f431, %r59;

$L__BB0_39:
	mul.ftz.f32 	%f350, %f9, %f431;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs64, %f350;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f351, %rs32;}

	// end inline asm
	mul.ftz.f32 	%f76, %f351, %f10;
	abs.ftz.f32 	%f77, %f76;
	setp.ltu.ftz.f32 	%p27, %f77, 0f3F19999A;
	@%p27 bra 	$L__BB0_41;
	bra.uni 	$L__BB0_40;

$L__BB0_41:
	mul.ftz.f32 	%f360, %f76, %f76;
	mov.f32 	%f361, 0fBD563CAE;
	mov.f32 	%f362, 0f3C80F082;
	fma.rn.ftz.f32 	%f363, %f362, %f360, %f361;
	mov.f32 	%f364, 0f3E085941;
	fma.rn.ftz.f32 	%f365, %f363, %f360, %f364;
	mov.f32 	%f366, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f367, %f365, %f360, %f366;
	mov.f32 	%f368, 0f00000000;
	fma.rn.ftz.f32 	%f369, %f367, %f360, %f368;
	fma.rn.ftz.f32 	%f432, %f369, %f76, %f76;
	bra.uni 	$L__BB0_42;

$L__BB0_40:
	mul.ftz.f32 	%f352, %f77, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f353, %f352;
	add.ftz.f32 	%f354, %f353, 0f3F800000;
	mov.f32 	%f355, 0f3F800000;
	rcp.approx.ftz.f32 	%f356, %f354;
	mov.f32 	%f357, 0fC0000000;
	fma.rn.ftz.f32 	%f358, %f356, %f357, %f355;
	setp.ge.ftz.f32 	%p28, %f77, 0f41102CB4;
	selp.f32 	%f359, 0f3F800000, %f358, %p28;
	mov.b32 	%r60, %f359;
	mov.b32 	%r61, %f76;
	and.b32  	%r62, %r61, -2147483648;
	or.b32  	%r63, %r62, %r60;
	mov.b32 	%f432, %r63;

$L__BB0_42:
	mul.ftz.f32 	%f370, %f9, %f432;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs66, %f370;}

	// end inline asm
	mov.b32 	%r64, %f8;
	mov.b32 	{%rs67, %rs37}, %r64;
	// begin inline asm
	{  cvt.f32.f16 %f371, %rs67;}

	// end inline asm
	mul.ftz.f32 	%f81, %f371, %f10;
	abs.ftz.f32 	%f82, %f81;
	setp.ltu.ftz.f32 	%p29, %f82, 0f3F19999A;
	@%p29 bra 	$L__BB0_44;
	bra.uni 	$L__BB0_43;

$L__BB0_44:
	mul.ftz.f32 	%f380, %f81, %f81;
	mov.f32 	%f381, 0fBD563CAE;
	mov.f32 	%f382, 0f3C80F082;
	fma.rn.ftz.f32 	%f383, %f382, %f380, %f381;
	mov.f32 	%f384, 0f3E085941;
	fma.rn.ftz.f32 	%f385, %f383, %f380, %f384;
	mov.f32 	%f386, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f387, %f385, %f380, %f386;
	mov.f32 	%f388, 0f00000000;
	fma.rn.ftz.f32 	%f389, %f387, %f380, %f388;
	fma.rn.ftz.f32 	%f433, %f389, %f81, %f81;
	bra.uni 	$L__BB0_45;

$L__BB0_43:
	mul.ftz.f32 	%f372, %f82, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f373, %f372;
	add.ftz.f32 	%f374, %f373, 0f3F800000;
	mov.f32 	%f375, 0f3F800000;
	rcp.approx.ftz.f32 	%f376, %f374;
	mov.f32 	%f377, 0fC0000000;
	fma.rn.ftz.f32 	%f378, %f376, %f377, %f375;
	setp.ge.ftz.f32 	%p30, %f82, 0f41102CB4;
	selp.f32 	%f379, 0f3F800000, %f378, %p30;
	mov.b32 	%r65, %f379;
	mov.b32 	%r66, %f81;
	and.b32  	%r67, %r66, -2147483648;
	or.b32  	%r68, %r67, %r65;
	mov.b32 	%f433, %r68;

$L__BB0_45:
	mul.ftz.f32 	%f390, %f9, %f433;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs68, %f390;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f391, %rs37;}

	// end inline asm
	mul.ftz.f32 	%f86, %f391, %f10;
	abs.ftz.f32 	%f87, %f86;
	setp.ltu.ftz.f32 	%p31, %f87, 0f3F19999A;
	@%p31 bra 	$L__BB0_47;
	bra.uni 	$L__BB0_46;

$L__BB0_47:
	mul.ftz.f32 	%f400, %f86, %f86;
	mov.f32 	%f401, 0fBD563CAE;
	mov.f32 	%f402, 0f3C80F082;
	fma.rn.ftz.f32 	%f403, %f402, %f400, %f401;
	mov.f32 	%f404, 0f3E085941;
	fma.rn.ftz.f32 	%f405, %f403, %f400, %f404;
	mov.f32 	%f406, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f407, %f405, %f400, %f406;
	mov.f32 	%f408, 0f00000000;
	fma.rn.ftz.f32 	%f409, %f407, %f400, %f408;
	fma.rn.ftz.f32 	%f434, %f409, %f86, %f86;
	bra.uni 	$L__BB0_48;

$L__BB0_46:
	mul.ftz.f32 	%f392, %f87, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f393, %f392;
	add.ftz.f32 	%f394, %f393, 0f3F800000;
	mov.f32 	%f395, 0f3F800000;
	rcp.approx.ftz.f32 	%f396, %f394;
	mov.f32 	%f397, 0fC0000000;
	fma.rn.ftz.f32 	%f398, %f396, %f397, %f395;
	setp.ge.ftz.f32 	%p32, %f87, 0f41102CB4;
	selp.f32 	%f399, 0f3F800000, %f398, %p32;
	mov.b32 	%r69, %f399;
	mov.b32 	%r70, %f86;
	and.b32  	%r71, %r70, -2147483648;
	or.b32  	%r72, %r71, %r69;
	mov.b32 	%f434, %r72;

$L__BB0_48:
	mul.ftz.f32 	%f410, %f9, %f434;
	// begin inline asm
	{  cvt.rn.f16.f32 %rs70, %f410;}

	// end inline asm
	mov.b32 	%r73, {%rs68, %rs70};
	mov.b32 	%r74, {%rs40, %rs42};
	mov.b32 	%r75, {%rs44, %rs46};
	mov.b32 	%r76, {%rs48, %rs50};
	mov.b32 	%r77, {%rs52, %rs54};
	mov.b32 	%r78, {%rs56, %rs58};
	mov.b32 	%r79, {%rs60, %rs62};
	mov.b32 	%r80, {%rs64, %rs66};
	mov.b32 	%f411, %r73;
	mov.b32 	%f412, %r80;
	mov.b32 	%f413, %r79;
	mov.b32 	%f414, %r78;
	mov.b32 	%f415, %r77;
	mov.b32 	%f416, %r76;
	mov.b32 	%f417, %r75;
	mov.b32 	%f418, %r74;
	st.param.f32 	[func_retval0+0], %f418;
	st.param.f32 	[func_retval0+4], %f417;
	st.param.f32 	[func_retval0+8], %f416;
	st.param.f32 	[func_retval0+12], %f415;
	st.param.f32 	[func_retval0+16], %f414;
	st.param.f32 	[func_retval0+20], %f413;
	st.param.f32 	[func_retval0+24], %f412;
	st.param.f32 	[func_retval0+28], %f411;
	ret;

}