.param.f32 	%f8, [activation_8_param_0+28];
	ld.param.f32 	%f7, [activation_8_param_0+24];
	ld.param.f32 	%f6, [activation_8_param_0+20];
	ld.param.f32 	%f5, [activation_8_param_0+16];
	ld.param.f32 	%f4, [activation_8_param_0+12];
	ld.param.f32 	%f3, [activation_8_param_0+8];
	ld.param.f32 	%f2, [activation_8_param_0+4];
	mov.b32 	{%rs39, %rs2}, %r1;
	// begin inline asm
	{  cvt.f32.f16 %f89, %rs39;}

	// end inline asm
	abs.ftz.f32 	%f10, %f89;
	setp.ltu.ftz.f32 	%p1, %f10, 0f3F19999A;
	@%p1 bra 	$L__BB0_2;
	bra.uni 	$L__BB0_1;

$L__BB0_2:
	mul.ftz.f32 	%f98, %f89, %f89;
	mov.f32 	%f99, 0fBD563CAE;
	mov.f32 	%f100, 0f3C80F082;
	fma.rn.ftz.f32 	%f101, %f100, %f98, %f99;
	mov.f32 	%f102, 0f3E085941;
	fma.rn.ftz.f32 	%f103, %f101, %f98, %f102;
	mov.f32 	%f104, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f105, %f103, %f98, %f104;
	mov.f32 	%f106, 0f00000000;
	fma.rn.ftz.f32 	%f107, %f105, %f98, %f106;
	fma.rn.ftz.f32 	%f417, %f107, %f89, %f89;
	bra.uni 	$L__BB0_3;

$L__BB0_1:
	mul.ftz.f32 	%f90, %f10, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f91, %f90;
	add.ftz.f32 	%f92, %f91, 0f3F800000;
	mov.f32 	%f93, 0f3F800000;
	rcp.approx.ftz.f32 	%f94, %f92;
	mov.f32 	%f95, 0fC0000000;
	fma.rn.ftz.f32 	%f96, %f94, %f95, %f93;
	setp.ge.ftz.f32 	%p2, %f10, 0f41102CB4;
	selp.f32 	%f97, 0f3F800000, %f96, %p2;
	mov.b32 	%r2, %f97;
	mov.b32 	%r3, %f89;
	and.b32  	%r4, %r3, -2147483648;
	or.b32  	%r5, %r4, %r2;
	mov.b32 	%f417, %r5;

$L__BB0_3:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs40, %f417;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f109, %rs2;}

	// end inline asm
	abs.ftz.f32 	%f15, %f109;
	setp.ltu.ftz.f32 	%p3, %f15, 0f3F19999A;
	@%p3 bra 	$L__BB0_5;
	bra.uni 	$L__BB0_4;

$L__BB0_5:
	mul.ftz.f32 	%f118, %f109, %f109;
	mov.f32 	%f119, 0fBD563CAE;
	mov.f32 	%f120, 0f3C80F082;
	fma.rn.ftz.f32 	%f121, %f120, %f118, %f119;
	mov.f32 	%f122, 0f3E085941;
	fma.rn.ftz.f32 	%f123, %f121, %f118, %f122;
	mov.f32 	%f124, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f125, %f123, %f118, %f124;
	mov.f32 	%f126, 0f00000000;
	fma.rn.ftz.f32 	%f127, %f125, %f118, %f126;
	fma.rn.ftz.f32 	%f418, %f127, %f109, %f109;
	bra.uni 	$L__BB0_6;

$L__BB0_4:
	mul.ftz.f32 	%f110, %f15, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f111, %f110;
	add.ftz.f32 	%f112, %f111, 0f3F800000;
	mov.f32 	%f113, 0f3F800000;
	rcp.approx.ftz.f32 	%f114, %f112;
	mov.f32 	%f115, 0fC0000000;
	fma.rn.ftz.f32 	%f116, %f114, %f115, %f113;
	setp.ge.ftz.f32 	%p4, %f15, 0f41102CB4;
	selp.f32 	%f117, 0f3F800000, %f116, %p4;
	mov.b32 	%r6, %f117;
	mov.b32 	%r7, %f109;
	and.b32  	%r8, %r7, -2147483648;
	or.b32  	%r9, %r8, %r6;
	mov.b32 	%f418, %r9;

$L__BB0_6:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs42, %f418;}

	// end inline asm
	mov.b32 	%r10, %f2;
	mov.b32 	{%rs43, %rs7}, %r10;
	// begin inline asm
	{  cvt.f32.f16 %f129, %rs43;}

	// end inline asm
	abs.ftz.f32 	%f20, %f129;
	setp.ltu.ftz.f32 	%p5, %f20, 0f3F19999A;
	@%p5 bra 	$L__BB0_8;
	bra.uni 	$L__BB0_7;

$L__BB0_8:
	mul.ftz.f32 	%f138, %f129, %f129;
	mov.f32 	%f139, 0fBD563CAE;
	mov.f32 	%f140, 0f3C80F082;
	fma.rn.ftz.f32 	%f141, %f140, %f138, %f139;
	mov.f32 	%f142, 0f3E085941;
	fma.rn.ftz.f32 	%f143, %f141, %f138, %f142;
	mov.f32 	%f144, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f145, %f143, %f138, %f144;
	mov.f32 	%f146, 0f00000000;
	fma.rn.ftz.f32 	%f147, %f145, %f138, %f146;
	fma.rn.ftz.f32 	%f419, %f147, %f129, %f129;
	bra.uni 	$L__BB0_9;

$L__BB0_7:
	mul.ftz.f32 	%f130, %f20, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f131, %f130;
	add.ftz.f32 	%f132, %f131, 0f3F800000;
	mov.f32 	%f133, 0f3F800000;
	rcp.approx.ftz.f32 	%f134, %f132;
	mov.f32 	%f135, 0fC0000000;
	fma.rn.ftz.f32 	%f136, %f134, %f135, %f133;
	setp.ge.ftz.f32 	%p6, %f20, 0f41102CB4;
	selp.f32 	%f137, 0f3F800000, %f136, %p6;
	mov.b32 	%r11, %f137;
	mov.b32 	%r12, %f129;
	and.b32  	%r13, %r12, -2147483648;
	or.b32  	%r14, %r13, %r11;
	mov.b32 	%f419, %r14;

$L__BB0_9:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs44, %f419;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f149, %rs7;}

	// end inline asm
	abs.ftz.f32 	%f25, %f149;
	setp.ltu.ftz.f32 	%p7, %f25, 0f3F19999A;
	@%p7 bra 	$L__BB0_11;
	bra.uni 	$L__BB0_10;

$L__BB0_11:
	mul.ftz.f32 	%f158, %f149, %f149;
	mov.f32 	%f159, 0fBD563CAE;
	mov.f32 	%f160, 0f3C80F082;
	fma.rn.ftz.f32 	%f161, %f160, %f158, %f159;
	mov.f32 	%f162, 0f3E085941;
	fma.rn.ftz.f32 	%f163, %f161, %f158, %f162;
	mov.f32 	%f164, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f165, %f163, %f158, %f164;
	mov.f32 	%f166, 0f00000000;
	fma.rn.ftz.f32 	%f167, %f165, %f158, %f166;
	fma.rn.ftz.f32 	%f420, %f167, %f149, %f149;
	bra.uni 	$L__BB0_12;

$L__BB0_10:
	mul.ftz.f32 	%f150, %f25, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f151, %f150;
	add.ftz.f32 	%f152, %f151, 0f3F800000;
	mov.f32 	%f153, 0f3F800000;
	rcp.approx.ftz.f32 	%f154, %f152;
	mov.f32 	%f155, 0fC0000000;
	fma.rn.ftz.f32 	%f156, %f154, %f155, %f153;
	setp.ge.ftz.f32 	%p8, %f25, 0f41102CB4;
	selp.f32 	%f157, 0f3F800000, %f156, %p8;
	mov.b32 	%r15, %f157;
	mov.b32 	%r16, %f149;
	and.b32  	%r17, %r16, -2147483648;
	or.b32  	%r18, %r17, %r15;
	mov.b32 	%f420, %r18;

$L__BB0_12:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs46, %f420;}

	// end inline asm
	mov.b32 	%r19, %f3;
	mov.b32 	{%rs47, %rs12}, %r19;
	// begin inline asm
	{  cvt.f32.f16 %f169, %rs47;}

	// end inline asm
	abs.ftz.f32 	%f30, %f169;
	setp.ltu.ftz.f32 	%p9, %f30, 0f3F19999A;
	@%p9 bra 	$L__BB0_14;
	bra.uni 	$L__BB0_13;

$L__BB0_14:
	mul.ftz.f32 	%f178, %f169, %f169;
	mov.f32 	%f179, 0fBD563CAE;
	mov.f32 	%f180, 0f3C80F082;
	fma.rn.ftz.f32 	%f181, %f180, %f178, %f179;
	mov.f32 	%f182, 0f3E085941;
	fma.rn.ftz.f32 	%f183, %f181, %f178, %f182;
	mov.f32 	%f184, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f185, %f183, %f178, %f184;
	mov.f32 	%f186, 0f00000000;
	fma.rn.ftz.f32 	%f187, %f185, %f178, %f186;
	fma.rn.ftz.f32 	%f421, %f187, %f169, %f169;
	bra.uni 	$L__BB0_15;

$L__BB0_13:
	mul.ftz.f32 	%f170, %f30, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f171, %f170;
	add.ftz.f32 	%f172, %f171, 0f3F800000;
	mov.f32 	%f173, 0f3F800000;
	rcp.approx.ftz.f32 	%f174, %f172;
	mov.f32 	%f175, 0fC0000000;
	fma.rn.ftz.f32 	%f176, %f174, %f175, %f173;
	setp.ge.ftz.f32 	%p10, %f30, 0f41102CB4;
	selp.f32 	%f177, 0f3F800000, %f176, %p10;
	mov.b32 	%r20, %f177;
	mov.b32 	%r21, %f169;
	and.b32  	%r22, %r21, -2147483648;
	or.b32  	%r23, %r22, %r20;
	mov.b32 	%f421, %r23;

$L__BB0_15:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs48, %f421;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f189, %rs12;}

	// end inline asm
	abs.ftz.f32 	%f35, %f189;
	setp.ltu.ftz.f32 	%p11, %f35, 0f3F19999A;
	@%p11 bra 	$L__BB0_17;
	bra.uni 	$L__BB0_16;

$L__BB0_17:
	mul.ftz.f32 	%f198, %f189, %f189;
	mov.f32 	%f199, 0fBD563CAE;
	mov.f32 	%f200, 0f3C80F082;
	fma.rn.ftz.f32 	%f201, %f200, %f198, %f199;
	mov.f32 	%f202, 0f3E085941;
	fma.rn.ftz.f32 	%f203, %f201, %f198, %f202;
	mov.f32 	%f204, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f205, %f203, %f198, %f204;
	mov.f32 	%f206, 0f00000000;
	fma.rn.ftz.f32 	%f207, %f205, %f198, %f206;
	fma.rn.ftz.f32 	%f422, %f207, %f189, %f189;
	bra.uni 	$L__BB0_18;

$L__BB0_16:
	mul.ftz.f32 	%f190, %f35, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f191, %f190;
	add.ftz.f32 	%f192, %f191, 0f3F800000;
	mov.f32 	%f193, 0f3F800000;
	rcp.approx.ftz.f32 	%f194, %f192;
	mov.f32 	%f195, 0fC0000000;
	fma.rn.ftz.f32 	%f196, %f194, %f195, %f193;
	setp.ge.ftz.f32 	%p12, %f35, 0f41102CB4;
	selp.f32 	%f197, 0f3F800000, %f196, %p12;
	mov.b32 	%r24, %f197;
	mov.b32 	%r25, %f189;
	and.b32  	%r26, %r25, -2147483648;
	or.b32  	%r27, %r26, %r24;
	mov.b32 	%f422, %r27;

$L__BB0_18:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs50, %f422;}

	// end inline asm
	mov.b32 	%r28, %f4;
	mov.b32 	{%rs51, %rs17}, %r28;
	// begin inline asm
	{  cvt.f32.f16 %f209, %rs51;}

	// end inline asm
	abs.ftz.f32 	%f40, %f209;
	setp.ltu.ftz.f32 	%p13, %f40, 0f3F19999A;
	@%p13 bra 	$L__BB0_20;
	bra.uni 	$L__BB0_19;

$L__BB0_20:
	mul.ftz.f32 	%f218, %f209, %f209;
	mov.f32 	%f219, 0fBD563CAE;
	mov.f32 	%f220, 0f3C80F082;
	fma.rn.ftz.f32 	%f221, %f220, %f218, %f219;
	mov.f32 	%f222, 0f3E085941;
	fma.rn.ftz.f32 	%f223, %f221, %f218, %f222;
	mov.f32 	%f224, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f225, %f223, %f218, %f224;
	mov.f32 	%f226, 0f00000000;
	fma.rn.ftz.f32 	%f227, %f225, %f218, %f226;
	fma.rn.ftz.f32 	%f423, %f227, %f209, %f209;
	bra.uni 	$L__BB0_21;

$L__BB0_19:
	mul.ftz.f32 	%f210, %f40, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f211, %f210;
	add.ftz.f32 	%f212, %f211, 0f3F800000;
	mov.f32 	%f213, 0f3F800000;
	rcp.approx.ftz.f32 	%f214, %f212;
	mov.f32 	%f215, 0fC0000000;
	fma.rn.ftz.f32 	%f216, %f214, %f215, %f213;
	setp.ge.ftz.f32 	%p14, %f40, 0f41102CB4;
	selp.f32 	%f217, 0f3F800000, %f216, %p14;
	mov.b32 	%r29, %f217;
	mov.b32 	%r30, %f209;
	and.b32  	%r31, %r30, -2147483648;
	or.b32  	%r32, %r31, %r29;
	mov.b32 	%f423, %r32;

$L__BB0_21:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs52, %f423;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f229, %rs17;}

	// end inline asm
	abs.ftz.f32 	%f45, %f229;
	setp.ltu.ftz.f32 	%p15, %f45, 0f3F19999A;
	@%p15 bra 	$L__BB0_23;
	bra.uni 	$L__BB0_22;

$L__BB0_23:
	mul.ftz.f32 	%f238, %f229, %f229;
	mov.f32 	%f239, 0fBD563CAE;
	mov.f32 	%f240, 0f3C80F082;
	fma.rn.ftz.f32 	%f241, %f240, %f238, %f239;
	mov.f32 	%f242, 0f3E085941;
	fma.rn.ftz.f32 	%f243, %f241, %f238, %f242;
	mov.f32 	%f244, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f245, %f243, %f238, %f244;
	mov.f32 	%f246, 0f00000000;
	fma.rn.ftz.f32 	%f247, %f245, %f238, %f246;
	fma.rn.ftz.f32 	%f424, %f247, %f229, %f229;
	bra.uni 	$L__BB0_24;

$L__BB0_22:
	mul.ftz.f32 	%f230, %f45, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f231, %f230;
	add.ftz.f32 	%f232, %f231, 0f3F800000;
	mov.f32 	%f233, 0f3F800000;
	rcp.approx.ftz.f32 	%f234, %f232;
	mov.f32 	%f235, 0fC0000000;
	fma.rn.ftz.f32 	%f236, %f234, %f235, %f233;
	setp.ge.ftz.f32 	%p16, %f45, 0f41102CB4;
	selp.f32 	%f237, 0f3F800000, %f236, %p16;
	mov.b32 	%r33, %f237;
	mov.b32 	%r34, %f229;
	and.b32  	%r35, %r34, -2147483648;
	or.b32  	%r36, %r35, %r33;
	mov.b32 	%f424, %r36;

$L__BB0_24:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs54, %f424;}

	// end inline asm
	mov.b32 	%r37, %f5;
	mov.b32 	{%rs55, %rs22}, %r37;
	// begin inline asm
	{  cvt.f32.f16 %f249, %rs55;}

	// end inline asm
	abs.ftz.f32 	%f50, %f249;
	setp.ltu.ftz.f32 	%p17, %f50, 0f3F19999A;
	@%p17 bra 	$L__BB0_26;
	bra.uni 	$L__BB0_25;

$L__BB0_26:
	mul.ftz.f32 	%f258, %f249, %f249;
	mov.f32 	%f259, 0fBD563CAE;
	mov.f32 	%f260, 0f3C80F082;
	fma.rn.ftz.f32 	%f261, %f260, %f258, %f259;
	mov.f32 	%f262, 0f3E085941;
	fma.rn.ftz.f32 	%f263, %f261, %f258, %f262;
	mov.f32 	%f264, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f265, %f263, %f258, %f264;
	mov.f32 	%f266, 0f00000000;
	fma.rn.ftz.f32 	%f267, %f265, %f258, %f266;
	fma.rn.ftz.f32 	%f425, %f267, %f249, %f249;
	bra.uni 	$L__BB0_27;

$L__BB0_25:
	mul.ftz.f32 	%f250, %f50, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f251, %f250;
	add.ftz.f32 	%f252, %f251, 0f3F800000;
	mov.f32 	%f253, 0f3F800000;
	rcp.approx.ftz.f32 	%f254, %f252;
	mov.f32 	%f255, 0fC0000000;
	fma.rn.ftz.f32 	%f256, %f254, %f255, %f253;
	setp.ge.ftz.f32 	%p18, %f50, 0f41102CB4;
	selp.f32 	%f257, 0f3F800000, %f256, %p18;
	mov.b32 	%r38, %f257;
	mov.b32 	%r39, %f249;
	and.b32  	%r40, %r39, -2147483648;
	or.b32  	%r41, %r40, %r38;
	mov.b32 	%f425, %r41;

$L__BB0_27:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs56, %f425;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f269, %rs22;}

	// end inline asm
	abs.ftz.f32 	%f55, %f269;
	setp.ltu.ftz.f32 	%p19, %f55, 0f3F19999A;
	@%p19 bra 	$L__BB0_29;
	bra.uni 	$L__BB0_28;

$L__BB0_29:
	mul.ftz.f32 	%f278, %f269, %f269;
	mov.f32 	%f279, 0fBD563CAE;
	mov.f32 	%f280, 0f3C80F082;
	fma.rn.ftz.f32 	%f281, %f280, %f278, %f279;
	mov.f32 	%f282, 0f3E085941;
	fma.rn.ftz.f32 	%f283, %f281, %f278, %f282;
	mov.f32 	%f284, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f285, %f283, %f278, %f284;
	mov.f32 	%f286, 0f00000000;
	fma.rn.ftz.f32 	%f287, %f285, %f278, %f286;
	fma.rn.ftz.f32 	%f426, %f287, %f269, %f269;
	bra.uni 	$L__BB0_30;

$L__BB0_28:
	mul.ftz.f32 	%f270, %f55, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f271, %f270;
	add.ftz.f32 	%f272, %f271, 0f3F800000;
	mov.f32 	%f273, 0f3F800000;
	rcp.approx.ftz.f32 	%f274, %f272;
	mov.f32 	%f275, 0fC0000000;
	fma.rn.ftz.f32 	%f276, %f274, %f275, %f273;
	setp.ge.ftz.f32 	%p20, %f55, 0f41102CB4;
	selp.f32 	%f277, 0f3F800000, %f276, %p20;
	mov.b32 	%r42, %f277;
	mov.b32 	%r43, %f269;
	and.b32  	%r44, %r43, -2147483648;
	or.b32  	%r45, %r44, %r42;
	mov.b32 	%f426, %r45;

$L__BB0_30:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs58, %f426;}

	// end inline asm
	mov.b32 	%r46, %f6;
	mov.b32 	{%rs59, %rs27}, %r46;
	// begin inline asm
	{  cvt.f32.f16 %f289, %rs59;}

	// end inline asm
	abs.ftz.f32 	%f60, %f289;
	setp.ltu.ftz.f32 	%p21, %f60, 0f3F19999A;
	@%p21 bra 	$L__BB0_32;
	bra.uni 	$L__BB0_31;

$L__BB0_32:
	mul.ftz.f32 	%f298, %f289, %f289;
	mov.f32 	%f299, 0fBD563CAE;
	mov.f32 	%f300, 0f3C80F082;
	fma.rn.ftz.f32 	%f301, %f300, %f298, %f299;
	mov.f32 	%f302, 0f3E085941;
	fma.rn.ftz.f32 	%f303, %f301, %f298, %f302;
	mov.f32 	%f304, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f305, %f303, %f298, %f304;
	mov.f32 	%f306, 0f00000000;
	fma.rn.ftz.f32 	%f307, %f305, %f298, %f306;
	fma.rn.ftz.f32 	%f427, %f307, %f289, %f289;
	bra.uni 	$L__BB0_33;

$L__BB0_31:
	mul.ftz.f32 	%f290, %f60, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f291, %f290;
	add.ftz.f32 	%f292, %f291, 0f3F800000;
	mov.f32 	%f293, 0f3F800000;
	rcp.approx.ftz.f32 	%f294, %f292;
	mov.f32 	%f295, 0fC0000000;
	fma.rn.ftz.f32 	%f296, %f294, %f295, %f293;
	setp.ge.ftz.f32 	%p22, %f60, 0f41102CB4;
	selp.f32 	%f297, 0f3F800000, %f296, %p22;
	mov.b32 	%r47, %f297;
	mov.b32 	%r48, %f289;
	and.b32  	%r49, %r48, -2147483648;
	or.b32  	%r50, %r49, %r47;
	mov.b32 	%f427, %r50;

$L__BB0_33:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs60, %f427;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f309, %rs27;}

	// end inline asm
	abs.ftz.f32 	%f65, %f309;
	setp.ltu.ftz.f32 	%p23, %f65, 0f3F19999A;
	@%p23 bra 	$L__BB0_35;
	bra.uni 	$L__BB0_34;

$L__BB0_35:
	mul.ftz.f32 	%f318, %f309, %f309;
	mov.f32 	%f319, 0fBD563CAE;
	mov.f32 	%f320, 0f3C80F082;
	fma.rn.ftz.f32 	%f321, %f320, %f318, %f319;
	mov.f32 	%f322, 0f3E085941;
	fma.rn.ftz.f32 	%f323, %f321, %f318, %f322;
	mov.f32 	%f324, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f325, %f323, %f318, %f324;
	mov.f32 	%f326, 0f00000000;
	fma.rn.ftz.f32 	%f327, %f325, %f318, %f326;
	fma.rn.ftz.f32 	%f428, %f327, %f309, %f309;
	bra.uni 	$L__BB0_36;

$L__BB0_34:
	mul.ftz.f32 	%f310, %f65, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f311, %f310;
	add.ftz.f32 	%f312, %f311, 0f3F800000;
	mov.f32 	%f313, 0f3F800000;
	rcp.approx.ftz.f32 	%f314, %f312;
	mov.f32 	%f315, 0fC0000000;
	fma.rn.ftz.f32 	%f316, %f314, %f315, %f313;
	setp.ge.ftz.f32 	%p24, %f65, 0f41102CB4;
	selp.f32 	%f317, 0f3F800000, %f316, %p24;
	mov.b32 	%r51, %f317;
	mov.b32 	%r52, %f309;
	and.b32  	%r53, %r52, -2147483648;
	or.b32  	%r54, %r53, %r51;
	mov.b32 	%f428, %r54;

$L__BB0_36:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs62, %f428;}

	// end inline asm
	mov.b32 	%r55, %f7;
	mov.b32 	{%rs63, %rs32}, %r55;
	// begin inline asm
	{  cvt.f32.f16 %f329, %rs63;}

	// end inline asm
	abs.ftz.f32 	%f70, %f329;
	setp.ltu.ftz.f32 	%p25, %f70, 0f3F19999A;
	@%p25 bra 	$L__BB0_38;
	bra.uni 	$L__BB0_37;

$L__BB0_38:
	mul.ftz.f32 	%f338, %f329, %f329;
	mov.f32 	%f339, 0fBD563CAE;
	mov.f32 	%f340, 0f3C80F082;
	fma.rn.ftz.f32 	%f341, %f340, %f338, %f339;
	mov.f32 	%f342, 0f3E085941;
	fma.rn.ftz.f32 	%f343, %f341, %f338, %f342;
	mov.f32 	%f344, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f345, %f343, %f338, %f344;
	mov.f32 	%f346, 0f00000000;
	fma.rn.ftz.f32 	%f347, %f345, %f338, %f346;
	fma.rn.ftz.f32 	%f429, %f347, %f329, %f329;
	bra.uni 	$L__BB0_39;

$L__BB0_37:
	mul.ftz.f32 	%f330, %f70, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f331, %f330;
	add.ftz.f32 	%f332, %f331, 0f3F800000;
	mov.f32 	%f333, 0f3F800000;
	rcp.approx.ftz.f32 	%f334, %f332;
	mov.f32 	%f335, 0fC0000000;
	fma.rn.ftz.f32 	%f336, %f334, %f335, %f333;
	setp.ge.ftz.f32 	%p26, %f70, 0f41102CB4;
	selp.f32 	%f337, 0f3F800000, %f336, %p26;
	mov.b32 	%r56, %f337;
	mov.b32 	%r57, %f329;
	and.b32  	%r58, %r57, -2147483648;
	or.b32  	%r59, %r58, %r56;
	mov.b32 	%f429, %r59;

$L__BB0_39:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs64, %f429;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f349, %rs32;}

	// end inline asm
	abs.ftz.f32 	%f75, %f349;
	setp.ltu.ftz.f32 	%p27, %f75, 0f3F19999A;
	@%p27 bra 	$L__BB0_41;
	bra.uni 	$L__BB0_40;

$L__BB0_41:
	mul.ftz.f32 	%f358, %f349, %f349;
	mov.f32 	%f359, 0fBD563CAE;
	mov.f32 	%f360, 0f3C80F082;
	fma.rn.ftz.f32 	%f361, %f360, %f358, %f359;
	mov.f32 	%f362, 0f3E085941;
	fma.rn.ftz.f32 	%f363, %f361, %f358, %f362;
	mov.f32 	%f364, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f365, %f363, %f358, %f364;
	mov.f32 	%f366, 0f00000000;
	fma.rn.ftz.f32 	%f367, %f365, %f358, %f366;
	fma.rn.ftz.f32 	%f430, %f367, %f349, %f349;
	bra.uni 	$L__BB0_42;

$L__BB0_40:
	mul.ftz.f32 	%f350, %f75, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f351, %f350;
	add.ftz.f32 	%f352, %f351, 0f3F800000;
	mov.f32 	%f353, 0f3F800000;
	rcp.approx.ftz.f32 	%f354, %f352;
	mov.f32 	%f355, 0fC0000000;
	fma.rn.ftz.f32 	%f356, %f354, %f355, %f353;
	setp.ge.ftz.f32 	%p28, %f75, 0f41102CB4;
	selp.f32 	%f357, 0f3F800000, %f356, %p28;
	mov.b32 	%r60, %f357;
	mov.b32 	%r61, %f349;
	and.b32  	%r62, %r61, -2147483648;
	or.b32  	%r63, %r62, %r60;
	mov.b32 	%f430, %r63;

$L__BB0_42:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs66, %f430;}

	// end inline asm
	mov.b32 	%r64, %f8;
	mov.b32 	{%rs67, %rs37}, %r64;
	// begin inline asm
	{  cvt.f32.f16 %f369, %rs67;}

	// end inline asm
	abs.ftz.f32 	%f80, %f369;
	setp.ltu.ftz.f32 	%p29, %f80, 0f3F19999A;
	@%p29 bra 	$L__BB0_44;
	bra.uni 	$L__BB0_43;

$L__BB0_44:
	mul.ftz.f32 	%f378, %f369, %f369;
	mov.f32 	%f379, 0fBD563CAE;
	mov.f32 	%f380, 0f3C80F082;
	fma.rn.ftz.f32 	%f381, %f380, %f378, %f379;
	mov.f32 	%f382, 0f3E085941;
	fma.rn.ftz.f32 	%f383, %f381, %f378, %f382;
	mov.f32 	%f384, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f385, %f383, %f378, %f384;
	mov.f32 	%f386, 0f00000000;
	fma.rn.ftz.f32 	%f387, %f385, %f378, %f386;
	fma.rn.ftz.f32 	%f431, %f387, %f369, %f369;
	bra.uni 	$L__BB0_45;

$L__BB0_43:
	mul.ftz.f32 	%f370, %f80, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f371, %f370;
	add.ftz.f32 	%f372, %f371, 0f3F800000;
	mov.f32 	%f373, 0f3F800000;
	rcp.approx.ftz.f32 	%f374, %f372;
	mov.f32 	%f375, 0fC0000000;
	fma.rn.ftz.f32 	%f376, %f374, %f375, %f373;
	setp.ge.ftz.f32 	%p30, %f80, 0f41102CB4;
	selp.f32 	%f377, 0f3F800000, %f376, %p30;
	mov.b32 	%r65, %f377;
	mov.b32 	%r66, %f369;
	and.b32  	%r67, %r66, -2147483648;
	or.b32  	%r68, %r67, %r65;
	mov.b32 	%f431, %r68;

$L__BB0_45:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs68, %f431;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f389, %rs37;}

	// end inline asm
	abs.ftz.f32 	%f85, %f389;
	setp.ltu.ftz.f32 	%p31, %f85, 0f3F19999A;
	@%p31 bra 	$L__BB0_47;
	bra.uni 	$L__BB0_46;

$L__BB0_47:
	mul.ftz.f32 	%f398, %f389, %f389;
	mov.f32 	%f399, 0fBD563CAE;
	mov.f32 	%f400, 0f3C80F082;
	fma.rn.ftz.f32 	%f401, %f400, %f398, %f399;
	mov.f32 	%f402, 0f3E085941;
	fma.rn.ftz.f32 	%f403, %f401, %f398, %f402;
	mov.f32 	%f404, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f405, %f403, %f398, %f404;
	mov.f32 	%f406, 0f00000000;
	fma.rn.ftz.f32 	%f407, %f405, %f398, %f406;
	fma.rn.ftz.f32 	%f432, %f407, %f389, %f389;
	bra.uni 	$L__BB0_48;

$L__BB0_46:
	mul.ftz.f32 	%f390, %f85, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f391, %f390;
	add.ftz.f32 	%f392, %f391, 0f3F800000;
	mov.f32 	%f393, 0f3F800000;
	rcp.approx.ftz.f32 	%f394, %f392;
	mov.f32 	%f395, 0fC0000000;
	fma.rn.ftz.f32 	%f396, %f394, %f395, %f393;
	setp.ge.ftz.f32 	%p32, %f85, 0f41102CB4;
	selp.f32 	%f397, 0f3F800000, %f396, %p32;
	mov.b32 	%r69, %f397;
	mov.b32 	%r70, %f389;
	and.b32  	%r71, %r70, -2147483648;
	or.b32  	%r72, %r71, %r69;
	mov.b32 	%f432, %r72;

$L__BB0_48:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs70, %f432;}

	// end inline asm
	mov.b32 	%r73, {%rs68, %rs70};
	mov.b32 	%r74, {%rs40, %rs42};
	mov.b32 	%r75, {%rs44, %rs46};
	mov.b32 	%r76, {%rs48, %rs50};
	mov.b32 	%r77, {%rs52, %rs54};
	mov.b32 	%r78, {%rs56, %rs58};
	mov.b32 	%r79, {%rs60, %rs62};
	mov.b32 	%r80, {%rs64, %rs66};
	mov.b32 	%f409, %r73;
	mov.b32 	%f410, %r80;
	mov.b32 	%f411, %r79;
	mov.b32 	%f412, %r78;
	mov.b32 	%f413, %r77;
	mov.b32 	%f414, %r76;
	mov.b32 	%f415, %r75;
	mov.b32 	%f416, %r74;
	st.param.f32 	[func_retval0+0], %f416;
	st.param.f32 	[func_retval0+4], %f415;
	st.param.f32 	[func_retval0+8], %f414;
	st.param.f32 	[func_retval0+12], %f413;
	st.param.f32 	[func_retval0+16], %f412;
	st.param.f32 	[func_retval0+20], %f411;
	st.param.f32 	[func_retval0+24], %f410;
	st.param.f32 	[func_retval0+28], %f409;
	ret;

}