ram.f32 	%f3, [activation_4_param_0+8];
	ld.param.f32 	%f2, [activation_4_param_0+4];
	ld.const.f32 	%f5, [params];
	mov.b32 	{%rs19, %rs2}, %r1;
	// begin inline asm
	{  cvt.f32.f16 %f74, %rs19;}

	// end inline asm
	setp.geu.ftz.f32 	%p1, %f74, 0f00000000;
	@%p1 bra 	$L__BB0_2;

	mul.ftz.f32 	%f31, %f74, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f32, %f31;
	add.ftz.f32 	%f33, %f32, 0fBF800000;
	mul.ftz.f32 	%f74, %f5, %f33;

$L__BB0_2:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs20, %f74;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f75, %rs2;}

	// end inline asm
	setp.geu.ftz.f32 	%p2, %f75, 0f00000000;
	@%p2 bra 	$L__BB0_4;

	mul.ftz.f32 	%f36, %f75, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f37, %f36;
	add.ftz.f32 	%f38, %f37, 0fBF800000;
	mul.ftz.f32 	%f75, %f5, %f38;

$L__BB0_4:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs22, %f75;}

	// end inline asm
	mov.b32 	%r2, %f2;
	mov.b32 	{%rs23, %rs7}, %r2;
	// begin inline asm
	{  cvt.f32.f16 %f76, %rs23;}

	// end inline asm
	setp.geu.ftz.f32 	%p3, %f76, 0f00000000;
	@%p3 bra 	$L__BB0_6;

	mul.ftz.f32 	%f41, %f76, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f42, %f41;
	add.ftz.f32 	%f43, %f42, 0fBF800000;
	mul.ftz.f32 	%f76, %f5, %f43;

$L__BB0_6:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs24, %f76;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f77, %rs7;}

	// end inline asm
	setp.geu.ftz.f32 	%p4, %f77, 0f00000000;
	@%p4 bra 	$L__BB0_8;

	mul.ftz.f32 	%f46, %f77, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f47, %f46;
	add.ftz.f32 	%f48, %f47, 0fBF800000;
	mul.ftz.f32 	%f77, %f5, %f48;

$L__BB0_8:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs26, %f77;}

	// end inline asm
	mov.b32 	%r3, %f3;
	mov.b32 	{%rs27, %rs12}, %r3;
	// begin inline asm
	{  cvt.f32.f16 %f78, %rs27;}

	// end inline asm
	setp.geu.ftz.f32 	%p5, %f78, 0f00000000;
	@%p5 bra 	$L__BB0_10;

	mul.ftz.f32 	%f51, %f78, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f52, %f51;
	add.ftz.f32 	%f53, %f52, 0fBF800000;
	mul.ftz.f32 	%f78, %f5, %f53;

$L__BB0_10:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs28, %f78;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f79, %rs12;}

	// end inline asm
	setp.geu.ftz.f32 	%p6, %f79, 0f00000000;
	@%p6 bra 	$L__BB0_12;

	mul.ftz.f32 	%f56, %f79, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f57, %f56;
	add.ftz.f32 	%f58, %f57, 0fBF800000;
	mul.ftz.f32 	%f79, %f5, %f58;

$L__BB0_12:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs30, %f79;}

	// end inline asm
	mov.b32 	%r4, %f4;
	mov.b32 	{%rs31, %rs17}, %r4;
	// begin inline asm
	{  cvt.f32.f16 %f80, %rs31;}

	// end inline asm
	setp.geu.ftz.f32 	%p7, %f80, 0f00000000;
	@%p7 bra 	$L__BB0_14;

	mul.ftz.f32 	%f61, %f80, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f62, %f61;
	add.ftz.f32 	%f63, %f62, 0fBF800000;
	mul.ftz.f32 	%f80, %f5, %f63;

$L__BB0_14:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs32, %f80;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f81, %rs17;}

	// end inline asm
	setp.geu.ftz.f32 	%p8, %f81, 0f00000000;
	@%p8 bra 	$L__BB0_16;

	mul.ftz.f32 	%f66, %f81, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f67, %f66;
	add.ftz.f32 	%f68, %f67, 0fBF800000;
	mul.ftz.f32 	%f81, %f5, %f68;

$L__BB0_16:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs34, %f81;}

	// end inline asm
	mov.b32 	%r5, {%rs32, %rs34};
	mov.b32 	%r6, {%rs20, %rs22};
	mov.b32 	%r7, {%rs24, %rs26};
	mov.b32 	%r8, {%rs28, %rs30};
	mov.b32 	%f70, %r5;
	mov.b32 	%f71, %r8;
	mov.b32 	%f72, %r7;
	mov.b32 	%f73, %r6;
	st.param.f32 	[func_retval0+0], %f73;
	st.param.f32 	[func_retval0+4], %f72;
	st.param.f32 	[func_retval0+8], %f71;
	st.param.f32 	[func_retval0+12], %f70;
	ret;

}