by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-31678015
// Cuda compilation tools, release 11.8, V11.8.85
// Based on NVVM 7.0.1
//

.version 7.8
.target sm_80
.address_size 64

	// .globl	activation_4
.visible .const .align 4 .b8 params[8];

.visible .func  (.param .align 4 .b8 func_retval0[16]) activation_4(
	.param .align 4 .b8 activation_4_param_0[16]
)
{
.pragma "abi_param_reg all";
	.reg .f32 	%f<17>;


	ld.param.f32 	%f1, [activation_4_param_0+12];
	ld.param.f32 	%f2, [activation_4_param_0+8];
	ld.param.f32 	%f3, [activation_4_param_0+4];
	ld.param.f32 	%f4, [activation_4_param_0];
	abs.ftz.f32 	%f5, %f4;
	add.ftz.f32 	%f6, %f5, 0f3F800000;
	abs.ftz.f32 	%f7, %f3;
	add.ftz.f32 	%f8, %f7, 0f3F800000;
	abs.ftz.f32 	%f9, %f2;
	add.ftz.f32 	%f10, %f9, 0f3F800000;
	abs.ftz.f32 	%f11, %f1;
	add.ftz.f32 	%f12, %f11, 0f3F800000;
	div.approx.ftz.f32 	%f13, %f1, %f12;
	div.approx.ftz.f32 	%f14, %f2, %f10;
	div.approx.ftz.f32 	%f15, %f3, %f8;
	div.approx.ftz.f32 	%f16, %f4, %f6;
	st.param.f32 	[func_retval0+0], %f16;
	st.param.f32 	[func_retval0+4], %f15;
	st.param.f32 	[func_retval0+8], %f14;
	st.param.f32 	[func_retval0+12], %f13;
	ret;

}