ld.param.f32 	%f1, [activation_16_param_0];
	mov.b32 	%r1, %f1;
	ld.param.f32 	%f16, [activation_16_param_0+60];
	ld.param.f32 	%f15, [activation_16_param_0+56];
	ld.param.f32 	%f14, [activation_16_param_0+52];
	ld.param.f32 	%f13, [activation_16_param_0+48];
	ld.param.f32 	%f12, [activation_16_param_0+44];
	ld.param.f32 	%f11, [activation_16_param_0+40];
	ld.param.f32 	%f10, [activation_16_param_0+36];
	ld.param.f32 	%f9, [activation_16_param_0+32];
	ld.param.f32 	%f8, [activation_16_param_0+28];
	ld.param.f32 	%f7, [activation_16_param_0+24];
	ld.param.f32 	%f6, [activation_16_param_0+20];
	ld.param.f32 	%f5, [activation_16_param_0+16];
	ld.param.f32 	%f4, [activation_16_param_0+12];
	ld.param.f32 	%f3, [activation_16_param_0+8];
	ld.param.f32 	%f2, [activation_16_param_0+4];
	mov.b32 	{%rs79, %rs2}, %r1;
	// begin inline asm
	{  cvt.f32.f16 %f177, %rs79;}

	// end inline asm
	abs.ftz.f32 	%f18, %f177;
	setp.ltu.ftz.f32 	%p1, %f18, 0f3F19999A;
	@%p1 bra 	$L__BB0_2;
	bra.uni 	$L__BB0_1;

$L__BB0_2:
	mul.ftz.f32 	%f186, %f177, %f177;
	mov.f32 	%f187, 0fBD563CAE;
	mov.f32 	%f188, 0f3C80F082;
	fma.rn.ftz.f32 	%f189, %f188, %f186, %f187;
	mov.f32 	%f190, 0f3E085941;
	fma.rn.ftz.f32 	%f191, %f189, %f186, %f190;
	mov.f32 	%f192, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f193, %f191, %f186, %f192;
	mov.f32 	%f194, 0f00000000;
	fma.rn.ftz.f32 	%f195, %f193, %f186, %f194;
	fma.rn.ftz.f32 	%f833, %f195, %f177, %f177;
	bra.uni 	$L__BB0_3;

$L__BB0_1:
	mul.ftz.f32 	%f178, %f18, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f179, %f178;
	add.ftz.f32 	%f180, %f179, 0f3F800000;
	mov.f32 	%f181, 0f3F800000;
	rcp.approx.ftz.f32 	%f182, %f180;
	mov.f32 	%f183, 0fC0000000;
	fma.rn.ftz.f32 	%f184, %f182, %f183, %f181;
	setp.ge.ftz.f32 	%p2, %f18, 0f41102CB4;
	selp.f32 	%f185, 0f3F800000, %f184, %p2;
	mov.b32 	%r2, %f185;
	mov.b32 	%r3, %f177;
	and.b32  	%r4, %r3, -2147483648;
	or.b32  	%r5, %r4, %r2;
	mov.b32 	%f833, %r5;

$L__BB0_3:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs80, %f833;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f197, %rs2;}

	// end inline asm
	abs.ftz.f32 	%f23, %f197;
	setp.ltu.ftz.f32 	%p3, %f23, 0f3F19999A;
	@%p3 bra 	$L__BB0_5;
	bra.uni 	$L__BB0_4;

$L__BB0_5:
	mul.ftz.f32 	%f206, %f197, %f197;
	mov.f32 	%f207, 0fBD563CAE;
	mov.f32 	%f208, 0f3C80F082;
	fma.rn.ftz.f32 	%f209, %f208, %f206, %f207;
	mov.f32 	%f210, 0f3E085941;
	fma.rn.ftz.f32 	%f211, %f209, %f206, %f210;
	mov.f32 	%f212, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f213, %f211, %f206, %f212;
	mov.f32 	%f214, 0f00000000;
	fma.rn.ftz.f32 	%f215, %f213, %f206, %f214;
	fma.rn.ftz.f32 	%f834, %f215, %f197, %f197;
	bra.uni 	$L__BB0_6;

$L__BB0_4:
	mul.ftz.f32 	%f198, %f23, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f199, %f198;
	add.ftz.f32 	%f200, %f199, 0f3F800000;
	mov.f32 	%f201, 0f3F800000;
	rcp.approx.ftz.f32 	%f202, %f200;
	mov.f32 	%f203, 0fC0000000;
	fma.rn.ftz.f32 	%f204, %f202, %f203, %f201;
	setp.ge.ftz.f32 	%p4, %f23, 0f41102CB4;
	selp.f32 	%f205, 0f3F800000, %f204, %p4;
	mov.b32 	%r6, %f205;
	mov.b32 	%r7, %f197;
	and.b32  	%r8, %r7, -2147483648;
	or.b32  	%r9, %r8, %r6;
	mov.b32 	%f834, %r9;

$L__BB0_6:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs82, %f834;}

	// end inline asm
	mov.b32 	%r10, %f2;
	mov.b32 	{%rs83, %rs7}, %r10;
	// begin inline asm
	{  cvt.f32.f16 %f217, %rs83;}

	// end inline asm
	abs.ftz.f32 	%f28, %f217;
	setp.ltu.ftz.f32 	%p5, %f28, 0f3F19999A;
	@%p5 bra 	$L__BB0_8;
	bra.uni 	$L__BB0_7;

$L__BB0_8:
	mul.ftz.f32 	%f226, %f217, %f217;
	mov.f32 	%f227, 0fBD563CAE;
	mov.f32 	%f228, 0f3C80F082;
	fma.rn.ftz.f32 	%f229, %f228, %f226, %f227;
	mov.f32 	%f230, 0f3E085941;
	fma.rn.ftz.f32 	%f231, %f229, %f226, %f230;
	mov.f32 	%f232, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f233, %f231, %f226, %f232;
	mov.f32 	%f234, 0f00000000;
	fma.rn.ftz.f32 	%f235, %f233, %f226, %f234;
	fma.rn.ftz.f32 	%f835, %f235, %f217, %f217;
	bra.uni 	$L__BB0_9;

$L__BB0_7:
	mul.ftz.f32 	%f218, %f28, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f219, %f218;
	add.ftz.f32 	%f220, %f219, 0f3F800000;
	mov.f32 	%f221, 0f3F800000;
	rcp.approx.ftz.f32 	%f222, %f220;
	mov.f32 	%f223, 0fC0000000;
	fma.rn.ftz.f32 	%f224, %f222, %f223, %f221;
	setp.ge.ftz.f32 	%p6, %f28, 0f41102CB4;
	selp.f32 	%f225, 0f3F800000, %f224, %p6;
	mov.b32 	%r11, %f225;
	mov.b32 	%r12, %f217;
	and.b32  	%r13, %r12, -2147483648;
	or.b32  	%r14, %r13, %r11;
	mov.b32 	%f835, %r14;

$L__BB0_9:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs84, %f835;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f237, %rs7;}

	// end inline asm
	abs.ftz.f32 	%f33, %f237;
	setp.ltu.ftz.f32 	%p7, %f33, 0f3F19999A;
	@%p7 bra 	$L__BB0_11;
	bra.uni 	$L__BB0_10;

$L__BB0_11:
	mul.ftz.f32 	%f246, %f237, %f237;
	mov.f32 	%f247, 0fBD563CAE;
	mov.f32 	%f248, 0f3C80F082;
	fma.rn.ftz.f32 	%f249, %f248, %f246, %f247;
	mov.f32 	%f250, 0f3E085941;
	fma.rn.ftz.f32 	%f251, %f249, %f246, %f250;
	mov.f32 	%f252, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f253, %f251, %f246, %f252;
	mov.f32 	%f254, 0f00000000;
	fma.rn.ftz.f32 	%f255, %f253, %f246, %f254;
	fma.rn.ftz.f32 	%f836, %f255, %f237, %f237;
	bra.uni 	$L__BB0_12;

$L__BB0_10:
	mul.ftz.f32 	%f238, %f33, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f239, %f238;
	add.ftz.f32 	%f240, %f239, 0f3F800000;
	mov.f32 	%f241, 0f3F800000;
	rcp.approx.ftz.f32 	%f242, %f240;
	mov.f32 	%f243, 0fC0000000;
	fma.rn.ftz.f32 	%f244, %f242, %f243, %f241;
	setp.ge.ftz.f32 	%p8, %f33, 0f41102CB4;
	selp.f32 	%f245, 0f3F800000, %f244, %p8;
	mov.b32 	%r15, %f245;
	mov.b32 	%r16, %f237;
	and.b32  	%r17, %r16, -2147483648;
	or.b32  	%r18, %r17, %r15;
	mov.b32 	%f836, %r18;

$L__BB0_12:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs86, %f836;}

	// end inline asm
	mov.b32 	%r19, %f3;
	mov.b32 	{%rs87, %rs12}, %r19;
	// begin inline asm
	{  cvt.f32.f16 %f257, %rs87;}

	// end inline asm
	abs.ftz.f32 	%f38, %f257;
	setp.ltu.ftz.f32 	%p9, %f38, 0f3F19999A;
	@%p9 bra 	$L__BB0_14;
	bra.uni 	$L__BB0_13;

$L__BB0_14:
	mul.ftz.f32 	%f266, %f257, %f257;
	mov.f32 	%f267, 0fBD563CAE;
	mov.f32 	%f268, 0f3C80F082;
	fma.rn.ftz.f32 	%f269, %f268, %f266, %f267;
	mov.f32 	%f270, 0f3E085941;
	fma.rn.ftz.f32 	%f271, %f269, %f266, %f270;
	mov.f32 	%f272, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f273, %f271, %f266, %f272;
	mov.f32 	%f274, 0f00000000;
	fma.rn.ftz.f32 	%f275, %f273, %f266, %f274;
	fma.rn.ftz.f32 	%f837, %f275, %f257, %f257;
	bra.uni 	$L__BB0_15;

$L__BB0_13:
	mul.ftz.f32 	%f258, %f38, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f259, %f258;
	add.ftz.f32 	%f260, %f259, 0f3F800000;
	mov.f32 	%f261, 0f3F800000;
	rcp.approx.ftz.f32 	%f262, %f260;
	mov.f32 	%f263, 0fC0000000;
	fma.rn.ftz.f32 	%f264, %f262, %f263, %f261;
	setp.ge.ftz.f32 	%p10, %f38, 0f41102CB4;
	selp.f32 	%f265, 0f3F800000, %f264, %p10;
	mov.b32 	%r20, %f265;
	mov.b32 	%r21, %f257;
	and.b32  	%r22, %r21, -2147483648;
	or.b32  	%r23, %r22, %r20;
	mov.b32 	%f837, %r23;

$L__BB0_15:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs88, %f837;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f277, %rs12;}

	// end inline asm
	abs.ftz.f32 	%f43, %f277;
	setp.ltu.ftz.f32 	%p11, %f43, 0f3F19999A;
	@%p11 bra 	$L__BB0_17;
	bra.uni 	$L__BB0_16;

$L__BB0_17:
	mul.ftz.f32 	%f286, %f277, %f277;
	mov.f32 	%f287, 0fBD563CAE;
	mov.f32 	%f288, 0f3C80F082;
	fma.rn.ftz.f32 	%f289, %f288, %f286, %f287;
	mov.f32 	%f290, 0f3E085941;
	fma.rn.ftz.f32 	%f291, %f289, %f286, %f290;
	mov.f32 	%f292, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f293, %f291, %f286, %f292;
	mov.f32 	%f294, 0f00000000;
	fma.rn.ftz.f32 	%f295, %f293, %f286, %f294;
	fma.rn.ftz.f32 	%f838, %f295, %f277, %f277;
	bra.uni 	$L__BB0_18;

$L__BB0_16:
	mul.ftz.f32 	%f278, %f43, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f279, %f278;
	add.ftz.f32 	%f280, %f279, 0f3F800000;
	mov.f32 	%f281, 0f3F800000;
	rcp.approx.ftz.f32 	%f282, %f280;
	mov.f32 	%f283, 0fC0000000;
	fma.rn.ftz.f32 	%f284, %f282, %f283, %f281;
	setp.ge.ftz.f32 	%p12, %f43, 0f41102CB4;
	selp.f32 	%f285, 0f3F800000, %f284, %p12;
	mov.b32 	%r24, %f285;
	mov.b32 	%r25, %f277;
	and.b32  	%r26, %r25, -2147483648;
	or.b32  	%r27, %r26, %r24;
	mov.b32 	%f838, %r27;

$L__BB0_18:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs90, %f838;}

	// end inline asm
	mov.b32 	%r28, %f4;
	mov.b32 	{%rs91, %rs17}, %r28;
	// begin inline asm
	{  cvt.f32.f16 %f297, %rs91;}

	// end inline asm
	abs.ftz.f32 	%f48, %f297;
	setp.ltu.ftz.f32 	%p13, %f48, 0f3F19999A;
	@%p13 bra 	$L__BB0_20;
	bra.uni 	$L__BB0_19;

$L__BB0_20:
	mul.ftz.f32 	%f306, %f297, %f297;
	mov.f32 	%f307, 0fBD563CAE;
	mov.f32 	%f308, 0f3C80F082;
	fma.rn.ftz.f32 	%f309, %f308, %f306, %f307;
	mov.f32 	%f310, 0f3E085941;
	fma.rn.ftz.f32 	%f311, %f309, %f306, %f310;
	mov.f32 	%f312, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f313, %f311, %f306, %f312;
	mov.f32 	%f314, 0f00000000;
	fma.rn.ftz.f32 	%f315, %f313, %f306, %f314;
	fma.rn.ftz.f32 	%f839, %f315, %f297, %f297;
	bra.uni 	$L__BB0_21;

$L__BB0_19:
	mul.ftz.f32 	%f298, %f48, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f299, %f298;
	add.ftz.f32 	%f300, %f299, 0f3F800000;
	mov.f32 	%f301, 0f3F800000;
	rcp.approx.ftz.f32 	%f302, %f300;
	mov.f32 	%f303, 0fC0000000;
	fma.rn.ftz.f32 	%f304, %f302, %f303, %f301;
	setp.ge.ftz.f32 	%p14, %f48, 0f41102CB4;
	selp.f32 	%f305, 0f3F800000, %f304, %p14;
	mov.b32 	%r29, %f305;
	mov.b32 	%r30, %f297;
	and.b32  	%r31, %r30, -2147483648;
	or.b32  	%r32, %r31, %r29;
	mov.b32 	%f839, %r32;

$L__BB0_21:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs92, %f839;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f317, %rs17;}

	// end inline asm
	abs.ftz.f32 	%f53, %f317;
	setp.ltu.ftz.f32 	%p15, %f53, 0f3F19999A;
	@%p15 bra 	$L__BB0_23;
	bra.uni 	$L__BB0_22;

$L__BB0_23:
	mul.ftz.f32 	%f326, %f317, %f317;
	mov.f32 	%f327, 0fBD563CAE;
	mov.f32 	%f328, 0f3C80F082;
	fma.rn.ftz.f32 	%f329, %f328, %f326, %f327;
	mov.f32 	%f330, 0f3E085941;
	fma.rn.ftz.f32 	%f331, %f329, %f326, %f330;
	mov.f32 	%f332, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f333, %f331, %f326, %f332;
	mov.f32 	%f334, 0f00000000;
	fma.rn.ftz.f32 	%f335, %f333, %f326, %f334;
	fma.rn.ftz.f32 	%f840, %f335, %f317, %f317;
	bra.uni 	$L__BB0_24;

$L__BB0_22:
	mul.ftz.f32 	%f318, %f53, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f319, %f318;
	add.ftz.f32 	%f320, %f319, 0f3F800000;
	mov.f32 	%f321, 0f3F800000;
	rcp.approx.ftz.f32 	%f322, %f320;
	mov.f32 	%f323, 0fC0000000;
	fma.rn.ftz.f32 	%f324, %f322, %f323, %f321;
	setp.ge.ftz.f32 	%p16, %f53, 0f41102CB4;
	selp.f32 	%f325, 0f3F800000, %f324, %p16;
	mov.b32 	%r33, %f325;
	mov.b32 	%r34, %f317;
	and.b32  	%r35, %r34, -2147483648;
	or.b32  	%r36, %r35, %r33;
	mov.b32 	%f840, %r36;

$L__BB0_24:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs94, %f840;}

	// end inline asm
	mov.b32 	%r37, %f5;
	mov.b32 	{%rs95, %rs22}, %r37;
	// begin inline asm
	{  cvt.f32.f16 %f337, %rs95;}

	// end inline asm
	abs.ftz.f32 	%f58, %f337;
	setp.ltu.ftz.f32 	%p17, %f58, 0f3F19999A;
	@%p17 bra 	$L__BB0_26;
	bra.uni 	$L__BB0_25;

$L__BB0_26:
	mul.ftz.f32 	%f346, %f337, %f337;
	mov.f32 	%f347, 0fBD563CAE;
	mov.f32 	%f348, 0f3C80F082;
	fma.rn.ftz.f32 	%f349, %f348, %f346, %f347;
	mov.f32 	%f350, 0f3E085941;
	fma.rn.ftz.f32 	%f351, %f349, %f346, %f350;
	mov.f32 	%f352, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f353, %f351, %f346, %f352;
	mov.f32 	%f354, 0f00000000;
	fma.rn.ftz.f32 	%f355, %f353, %f346, %f354;
	fma.rn.ftz.f32 	%f841, %f355, %f337, %f337;
	bra.uni 	$L__BB0_27;

$L__BB0_25:
	mul.ftz.f32 	%f338, %f58, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f339, %f338;
	add.ftz.f32 	%f340, %f339, 0f3F800000;
	mov.f32 	%f341, 0f3F800000;
	rcp.approx.ftz.f32 	%f342, %f340;
	mov.f32 	%f343, 0fC0000000;
	fma.rn.ftz.f32 	%f344, %f342, %f343, %f341;
	setp.ge.ftz.f32 	%p18, %f58, 0f41102CB4;
	selp.f32 	%f345, 0f3F800000, %f344, %p18;
	mov.b32 	%r38, %f345;
	mov.b32 	%r39, %f337;
	and.b32  	%r40, %r39, -2147483648;
	or.b32  	%r41, %r40, %r38;
	mov.b32 	%f841, %r41;

$L__BB0_27:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs96, %f841;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f357, %rs22;}

	// end inline asm
	abs.ftz.f32 	%f63, %f357;
	setp.ltu.ftz.f32 	%p19, %f63, 0f3F19999A;
	@%p19 bra 	$L__BB0_29;
	bra.uni 	$L__BB0_28;

$L__BB0_29:
	mul.ftz.f32 	%f366, %f357, %f357;
	mov.f32 	%f367, 0fBD563CAE;
	mov.f32 	%f368, 0f3C80F082;
	fma.rn.ftz.f32 	%f369, %f368, %f366, %f367;
	mov.f32 	%f370, 0f3E085941;
	fma.rn.ftz.f32 	%f371, %f369, %f366, %f370;
	mov.f32 	%f372, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f373, %f371, %f366, %f372;
	mov.f32 	%f374, 0f00000000;
	fma.rn.ftz.f32 	%f375, %f373, %f366, %f374;
	fma.rn.ftz.f32 	%f842, %f375, %f357, %f357;
	bra.uni 	$L__BB0_30;

$L__BB0_28:
	mul.ftz.f32 	%f358, %f63, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f359, %f358;
	add.ftz.f32 	%f360, %f359, 0f3F800000;
	mov.f32 	%f361, 0f3F800000;
	rcp.approx.ftz.f32 	%f362, %f360;
	mov.f32 	%f363, 0fC0000000;
	fma.rn.ftz.f32 	%f364, %f362, %f363, %f361;
	setp.ge.ftz.f32 	%p20, %f63, 0f41102CB4;
	selp.f32 	%f365, 0f3F800000, %f364, %p20;
	mov.b32 	%r42, %f365;
	mov.b32 	%r43, %f357;
	and.b32  	%r44, %r43, -2147483648;
	or.b32  	%r45, %r44, %r42;
	mov.b32 	%f842, %r45;

$L__BB0_30:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs98, %f842;}

	// end inline asm
	mov.b32 	%r46, %f6;
	mov.b32 	{%rs99, %rs27}, %r46;
	// begin inline asm
	{  cvt.f32.f16 %f377, %rs99;}

	// end inline asm
	abs.ftz.f32 	%f68, %f377;
	setp.ltu.ftz.f32 	%p21, %f68, 0f3F19999A;
	@%p21 bra 	$L__BB0_32;
	bra.uni 	$L__BB0_31;

$L__BB0_32:
	mul.ftz.f32 	%f386, %f377, %f377;
	mov.f32 	%f387, 0fBD563CAE;
	mov.f32 	%f388, 0f3C80F082;
	fma.rn.ftz.f32 	%f389, %f388, %f386, %f387;
	mov.f32 	%f390, 0f3E085941;
	fma.rn.ftz.f32 	%f391, %f389, %f386, %f390;
	mov.f32 	%f392, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f393, %f391, %f386, %f392;
	mov.f32 	%f394, 0f00000000;
	fma.rn.ftz.f32 	%f395, %f393, %f386, %f394;
	fma.rn.ftz.f32 	%f843, %f395, %f377, %f377;
	bra.uni 	$L__BB0_33;

$L__BB0_31:
	mul.ftz.f32 	%f378, %f68, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f379, %f378;
	add.ftz.f32 	%f380, %f379, 0f3F800000;
	mov.f32 	%f381, 0f3F800000;
	rcp.approx.ftz.f32 	%f382, %f380;
	mov.f32 	%f383, 0fC0000000;
	fma.rn.ftz.f32 	%f384, %f382, %f383, %f381;
	setp.ge.ftz.f32 	%p22, %f68, 0f41102CB4;
	selp.f32 	%f385, 0f3F800000, %f384, %p22;
	mov.b32 	%r47, %f385;
	mov.b32 	%r48, %f377;
	and.b32  	%r49, %r48, -2147483648;
	or.b32  	%r50, %r49, %r47;
	mov.b32 	%f843, %r50;

$L__BB0_33:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs100, %f843;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f397, %rs27;}

	// end inline asm
	abs.ftz.f32 	%f73, %f397;
	setp.ltu.ftz.f32 	%p23, %f73, 0f3F19999A;
	@%p23 bra 	$L__BB0_35;
	bra.uni 	$L__BB0_34;

$L__BB0_35:
	mul.ftz.f32 	%f406, %f397, %f397;
	mov.f32 	%f407, 0fBD563CAE;
	mov.f32 	%f408, 0f3C80F082;
	fma.rn.ftz.f32 	%f409, %f408, %f406, %f407;
	mov.f32 	%f410, 0f3E085941;
	fma.rn.ftz.f32 	%f411, %f409, %f406, %f410;
	mov.f32 	%f412, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f413, %f411, %f406, %f412;
	mov.f32 	%f414, 0f00000000;
	fma.rn.ftz.f32 	%f415, %f413, %f406, %f414;
	fma.rn.ftz.f32 	%f844, %f415, %f397, %f397;
	bra.uni 	$L__BB0_36;

$L__BB0_34:
	mul.ftz.f32 	%f398, %f73, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f399, %f398;
	add.ftz.f32 	%f400, %f399, 0f3F800000;
	mov.f32 	%f401, 0f3F800000;
	rcp.approx.ftz.f32 	%f402, %f400;
	mov.f32 	%f403, 0fC0000000;
	fma.rn.ftz.f32 	%f404, %f402, %f403, %f401;
	setp.ge.ftz.f32 	%p24, %f73, 0f41102CB4;
	selp.f32 	%f405, 0f3F800000, %f404, %p24;
	mov.b32 	%r51, %f405;
	mov.b32 	%r52, %f397;
	and.b32  	%r53, %r52, -2147483648;
	or.b32  	%r54, %r53, %r51;
	mov.b32 	%f844, %r54;

$L__BB0_36:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs102, %f844;}

	// end inline asm
	mov.b32 	%r55, %f7;
	mov.b32 	{%rs103, %rs32}, %r55;
	// begin inline asm
	{  cvt.f32.f16 %f417, %rs103;}

	// end inline asm
	abs.ftz.f32 	%f78, %f417;
	setp.ltu.ftz.f32 	%p25, %f78, 0f3F19999A;
	@%p25 bra 	$L__BB0_38;
	bra.uni 	$L__BB0_37;

$L__BB0_38:
	mul.ftz.f32 	%f426, %f417, %f417;
	mov.f32 	%f427, 0fBD563CAE;
	mov.f32 	%f428, 0f3C80F082;
	fma.rn.ftz.f32 	%f429, %f428, %f426, %f427;
	mov.f32 	%f430, 0f3E085941;
	fma.rn.ftz.f32 	%f431, %f429, %f426, %f430;
	mov.f32 	%f432, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f433, %f431, %f426, %f432;
	mov.f32 	%f434, 0f00000000;
	fma.rn.ftz.f32 	%f435, %f433, %f426, %f434;
	fma.rn.ftz.f32 	%f845, %f435, %f417, %f417;
	bra.uni 	$L__BB0_39;

$L__BB0_37:
	mul.ftz.f32 	%f418, %f78, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f419, %f418;
	add.ftz.f32 	%f420, %f419, 0f3F800000;
	mov.f32 	%f421, 0f3F800000;
	rcp.approx.ftz.f32 	%f422, %f420;
	mov.f32 	%f423, 0fC0000000;
	fma.rn.ftz.f32 	%f424, %f422, %f423, %f421;
	setp.ge.ftz.f32 	%p26, %f78, 0f41102CB4;
	selp.f32 	%f425, 0f3F800000, %f424, %p26;
	mov.b32 	%r56, %f425;
	mov.b32 	%r57, %f417;
	and.b32  	%r58, %r57, -2147483648;
	or.b32  	%r59, %r58, %r56;
	mov.b32 	%f845, %r59;

$L__BB0_39:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs104, %f845;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f437, %rs32;}

	// end inline asm
	abs.ftz.f32 	%f83, %f437;
	setp.ltu.ftz.f32 	%p27, %f83, 0f3F19999A;
	@%p27 bra 	$L__BB0_41;
	bra.uni 	$L__BB0_40;

$L__BB0_41:
	mul.ftz.f32 	%f446, %f437, %f437;
	mov.f32 	%f447, 0fBD563CAE;
	mov.f32 	%f448, 0f3C80F082;
	fma.rn.ftz.f32 	%f449, %f448, %f446, %f447;
	mov.f32 	%f450, 0f3E085941;
	fma.rn.ftz.f32 	%f451, %f449, %f446, %f450;
	mov.f32 	%f452, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f453, %f451, %f446, %f452;
	mov.f32 	%f454, 0f00000000;
	fma.rn.ftz.f32 	%f455, %f453, %f446, %f454;
	fma.rn.ftz.f32 	%f846, %f455, %f437, %f437;
	bra.uni 	$L__BB0_42;

$L__BB0_40:
	mul.ftz.f32 	%f438, %f83, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f439, %f438;
	add.ftz.f32 	%f440, %f439, 0f3F800000;
	mov.f32 	%f441, 0f3F800000;
	rcp.approx.ftz.f32 	%f442, %f440;
	mov.f32 	%f443, 0fC0000000;
	fma.rn.ftz.f32 	%f444, %f442, %f443, %f441;
	setp.ge.ftz.f32 	%p28, %f83, 0f41102CB4;
	selp.f32 	%f445, 0f3F800000, %f444, %p28;
	mov.b32 	%r60, %f445;
	mov.b32 	%r61, %f437;
	and.b32  	%r62, %r61, -2147483648;
	or.b32  	%r63, %r62, %r60;
	mov.b32 	%f846, %r63;

$L__BB0_42:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs106, %f846;}

	// end inline asm
	mov.b32 	%r64, %f8;
	mov.b32 	{%rs107, %rs37}, %r64;
	// begin inline asm
	{  cvt.f32.f16 %f457, %rs107;}

	// end inline asm
	abs.ftz.f32 	%f88, %f457;
	setp.ltu.ftz.f32 	%p29, %f88, 0f3F19999A;
	@%p29 bra 	$L__BB0_44;
	bra.uni 	$L__BB0_43;

$L__BB0_44:
	mul.ftz.f32 	%f466, %f457, %f457;
	mov.f32 	%f467, 0fBD563CAE;
	mov.f32 	%f468, 0f3C80F082;
	fma.rn.ftz.f32 	%f469, %f468, %f466, %f467;
	mov.f32 	%f470, 0f3E085941;
	fma.rn.ftz.f32 	%f471, %f469, %f466, %f470;
	mov.f32 	%f472, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f473, %f471, %f466, %f472;
	mov.f32 	%f474, 0f00000000;
	fma.rn.ftz.f32 	%f475, %f473, %f466, %f474;
	fma.rn.ftz.f32 	%f847, %f475, %f457, %f457;
	bra.uni 	$L__BB0_45;

$L__BB0_43:
	mul.ftz.f32 	%f458, %f88, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f459, %f458;
	add.ftz.f32 	%f460, %f459, 0f3F800000;
	mov.f32 	%f461, 0f3F800000;
	rcp.approx.ftz.f32 	%f462, %f460;
	mov.f32 	%f463, 0fC0000000;
	fma.rn.ftz.f32 	%f464, %f462, %f463, %f461;
	setp.ge.ftz.f32 	%p30, %f88, 0f41102CB4;
	selp.f32 	%f465, 0f3F800000, %f464, %p30;
	mov.b32 	%r65, %f465;
	mov.b32 	%r66, %f457;
	and.b32  	%r67, %r66, -2147483648;
	or.b32  	%r68, %r67, %r65;
	mov.b32 	%f847, %r68;

$L__BB0_45:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs108, %f847;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f477, %rs37;}

	// end inline asm
	abs.ftz.f32 	%f93, %f477;
	setp.ltu.ftz.f32 	%p31, %f93, 0f3F19999A;
	@%p31 bra 	$L__BB0_47;
	bra.uni 	$L__BB0_46;

$L__BB0_47:
	mul.ftz.f32 	%f486, %f477, %f477;
	mov.f32 	%f487, 0fBD563CAE;
	mov.f32 	%f488, 0f3C80F082;
	fma.rn.ftz.f32 	%f489, %f488, %f486, %f487;
	mov.f32 	%f490, 0f3E085941;
	fma.rn.ftz.f32 	%f491, %f489, %f486, %f490;
	mov.f32 	%f492, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f493, %f491, %f486, %f492;
	mov.f32 	%f494, 0f00000000;
	fma.rn.ftz.f32 	%f495, %f493, %f486, %f494;
	fma.rn.ftz.f32 	%f848, %f495, %f477, %f477;
	bra.uni 	$L__BB0_48;

$L__BB0_46:
	mul.ftz.f32 	%f478, %f93, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f479, %f478;
	add.ftz.f32 	%f480, %f479, 0f3F800000;
	mov.f32 	%f481, 0f3F800000;
	rcp.approx.ftz.f32 	%f482, %f480;
	mov.f32 	%f483, 0fC0000000;
	fma.rn.ftz.f32 	%f484, %f482, %f483, %f481;
	setp.ge.ftz.f32 	%p32, %f93, 0f41102CB4;
	selp.f32 	%f485, 0f3F800000, %f484, %p32;
	mov.b32 	%r69, %f485;
	mov.b32 	%r70, %f477;
	and.b32  	%r71, %r70, -2147483648;
	or.b32  	%r72, %r71, %r69;
	mov.b32 	%f848, %r72;

$L__BB0_48:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs110, %f848;}

	// end inline asm
	mov.b32 	%r73, %f9;
	mov.b32 	{%rs111, %rs42}, %r73;
	// begin inline asm
	{  cvt.f32.f16 %f497, %rs111;}

	// end inline asm
	abs.ftz.f32 	%f98, %f497;
	setp.ltu.ftz.f32 	%p33, %f98, 0f3F19999A;
	@%p33 bra 	$L__BB0_50;
	bra.uni 	$L__BB0_49;

$L__BB0_50:
	mul.ftz.f32 	%f506, %f497, %f497;
	mov.f32 	%f507, 0fBD563CAE;
	mov.f32 	%f508, 0f3C80F082;
	fma.rn.ftz.f32 	%f509, %f508, %f506, %f507;
	mov.f32 	%f510, 0f3E085941;
	fma.rn.ftz.f32 	%f511, %f509, %f506, %f510;
	mov.f32 	%f512, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f513, %f511, %f506, %f512;
	mov.f32 	%f514, 0f00000000;
	fma.rn.ftz.f32 	%f515, %f513, %f506, %f514;
	fma.rn.ftz.f32 	%f849, %f515, %f497, %f497;
	bra.uni 	$L__BB0_51;

$L__BB0_49:
	mul.ftz.f32 	%f498, %f98, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f499, %f498;
	add.ftz.f32 	%f500, %f499, 0f3F800000;
	mov.f32 	%f501, 0f3F800000;
	rcp.approx.ftz.f32 	%f502, %f500;
	mov.f32 	%f503, 0fC0000000;
	fma.rn.ftz.f32 	%f504, %f502, %f503, %f501;
	setp.ge.ftz.f32 	%p34, %f98, 0f41102CB4;
	selp.f32 	%f505, 0f3F800000, %f504, %p34;
	mov.b32 	%r74, %f505;
	mov.b32 	%r75, %f497;
	and.b32  	%r76, %r75, -2147483648;
	or.b32  	%r77, %r76, %r74;
	mov.b32 	%f849, %r77;

$L__BB0_51:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs112, %f849;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f517, %rs42;}

	// end inline asm
	abs.ftz.f32 	%f103, %f517;
	setp.ltu.ftz.f32 	%p35, %f103, 0f3F19999A;
	@%p35 bra 	$L__BB0_53;
	bra.uni 	$L__BB0_52;

$L__BB0_53:
	mul.ftz.f32 	%f526, %f517, %f517;
	mov.f32 	%f527, 0fBD563CAE;
	mov.f32 	%f528, 0f3C80F082;
	fma.rn.ftz.f32 	%f529, %f528, %f526, %f527;
	mov.f32 	%f530, 0f3E085941;
	fma.rn.ftz.f32 	%f531, %f529, %f526, %f530;
	mov.f32 	%f532, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f533, %f531, %f526, %f532;
	mov.f32 	%f534, 0f00000000;
	fma.rn.ftz.f32 	%f535, %f533, %f526, %f534;
	fma.rn.ftz.f32 	%f850, %f535, %f517, %f517;
	bra.uni 	$L__BB0_54;

$L__BB0_52:
	mul.ftz.f32 	%f518, %f103, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f519, %f518;
	add.ftz.f32 	%f520, %f519, 0f3F800000;
	mov.f32 	%f521, 0f3F800000;
	rcp.approx.ftz.f32 	%f522, %f520;
	mov.f32 	%f523, 0fC0000000;
	fma.rn.ftz.f32 	%f524, %f522, %f523, %f521;
	setp.ge.ftz.f32 	%p36, %f103, 0f41102CB4;
	selp.f32 	%f525, 0f3F800000, %f524, %p36;
	mov.b32 	%r78, %f525;
	mov.b32 	%r79, %f517;
	and.b32  	%r80, %r79, -2147483648;
	or.b32  	%r81, %r80, %r78;
	mov.b32 	%f850, %r81;

$L__BB0_54:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs114, %f850;}

	// end inline asm
	mov.b32 	%r82, %f10;
	mov.b32 	{%rs115, %rs47}, %r82;
	// begin inline asm
	{  cvt.f32.f16 %f537, %rs115;}

	// end inline asm
	abs.ftz.f32 	%f108, %f537;
	setp.ltu.ftz.f32 	%p37, %f108, 0f3F19999A;
	@%p37 bra 	$L__BB0_56;
	bra.uni 	$L__BB0_55;

$L__BB0_56:
	mul.ftz.f32 	%f546, %f537, %f537;
	mov.f32 	%f547, 0fBD563CAE;
	mov.f32 	%f548, 0f3C80F082;
	fma.rn.ftz.f32 	%f549, %f548, %f546, %f547;
	mov.f32 	%f550, 0f3E085941;
	fma.rn.ftz.f32 	%f551, %f549, %f546, %f550;
	mov.f32 	%f552, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f553, %f551, %f546, %f552;
	mov.f32 	%f554, 0f00000000;
	fma.rn.ftz.f32 	%f555, %f553, %f546, %f554;
	fma.rn.ftz.f32 	%f851, %f555, %f537, %f537;
	bra.uni 	$L__BB0_57;

$L__BB0_55:
	mul.ftz.f32 	%f538, %f108, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f539, %f538;
	add.ftz.f32 	%f540, %f539, 0f3F800000;
	mov.f32 	%f541, 0f3F800000;
	rcp.approx.ftz.f32 	%f542, %f540;
	mov.f32 	%f543, 0fC0000000;
	fma.rn.ftz.f32 	%f544, %f542, %f543, %f541;
	setp.ge.ftz.f32 	%p38, %f108, 0f41102CB4;
	selp.f32 	%f545, 0f3F800000, %f544, %p38;
	mov.b32 	%r83, %f545;
	mov.b32 	%r84, %f537;
	and.b32  	%r85, %r84, -2147483648;
	or.b32  	%r86, %r85, %r83;
	mov.b32 	%f851, %r86;

$L__BB0_57:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs116, %f851;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f557, %rs47;}

	// end inline asm
	abs.ftz.f32 	%f113, %f557;
	setp.ltu.ftz.f32 	%p39, %f113, 0f3F19999A;
	@%p39 bra 	$L__BB0_59;
	bra.uni 	$L__BB0_58;

$L__BB0_59:
	mul.ftz.f32 	%f566, %f557, %f557;
	mov.f32 	%f567, 0fBD563CAE;
	mov.f32 	%f568, 0f3C80F082;
	fma.rn.ftz.f32 	%f569, %f568, %f566, %f567;
	mov.f32 	%f570, 0f3E085941;
	fma.rn.ftz.f32 	%f571, %f569, %f566, %f570;
	mov.f32 	%f572, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f573, %f571, %f566, %f572;
	mov.f32 	%f574, 0f00000000;
	fma.rn.ftz.f32 	%f575, %f573, %f566, %f574;
	fma.rn.ftz.f32 	%f852, %f575, %f557, %f557;
	bra.uni 	$L__BB0_60;

$L__BB0_58:
	mul.ftz.f32 	%f558, %f113, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f559, %f558;
	add.ftz.f32 	%f560, %f559, 0f3F800000;
	mov.f32 	%f561, 0f3F800000;
	rcp.approx.ftz.f32 	%f562, %f560;
	mov.f32 	%f563, 0fC0000000;
	fma.rn.ftz.f32 	%f564, %f562, %f563, %f561;
	setp.ge.ftz.f32 	%p40, %f113, 0f41102CB4;
	selp.f32 	%f565, 0f3F800000, %f564, %p40;
	mov.b32 	%r87, %f565;
	mov.b32 	%r88, %f557;
	and.b32  	%r89, %r88, -2147483648;
	or.b32  	%r90, %r89, %r87;
	mov.b32 	%f852, %r90;

$L__BB0_60:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs118, %f852;}

	// end inline asm
	mov.b32 	%r91, %f11;
	mov.b32 	{%rs119, %rs52}, %r91;
	// begin inline asm
	{  cvt.f32.f16 %f577, %rs119;}

	// end inline asm
	abs.ftz.f32 	%f118, %f577;
	setp.ltu.ftz.f32 	%p41, %f118, 0f3F19999A;
	@%p41 bra 	$L__BB0_62;
	bra.uni 	$L__BB0_61;

$L__BB0_62:
	mul.ftz.f32 	%f586, %f577, %f577;
	mov.f32 	%f587, 0fBD563CAE;
	mov.f32 	%f588, 0f3C80F082;
	fma.rn.ftz.f32 	%f589, %f588, %f586, %f587;
	mov.f32 	%f590, 0f3E085941;
	fma.rn.ftz.f32 	%f591, %f589, %f586, %f590;
	mov.f32 	%f592, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f593, %f591, %f586, %f592;
	mov.f32 	%f594, 0f00000000;
	fma.rn.ftz.f32 	%f595, %f593, %f586, %f594;
	fma.rn.ftz.f32 	%f853, %f595, %f577, %f577;
	bra.uni 	$L__BB0_63;

$L__BB0_61:
	mul.ftz.f32 	%f578, %f118, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f579, %f578;
	add.ftz.f32 	%f580, %f579, 0f3F800000;
	mov.f32 	%f581, 0f3F800000;
	rcp.approx.ftz.f32 	%f582, %f580;
	mov.f32 	%f583, 0fC0000000;
	fma.rn.ftz.f32 	%f584, %f582, %f583, %f581;
	setp.ge.ftz.f32 	%p42, %f118, 0f41102CB4;
	selp.f32 	%f585, 0f3F800000, %f584, %p42;
	mov.b32 	%r92, %f585;
	mov.b32 	%r93, %f577;
	and.b32  	%r94, %r93, -2147483648;
	or.b32  	%r95, %r94, %r92;
	mov.b32 	%f853, %r95;

$L__BB0_63:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs120, %f853;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f597, %rs52;}

	// end inline asm
	abs.ftz.f32 	%f123, %f597;
	setp.ltu.ftz.f32 	%p43, %f123, 0f3F19999A;
	@%p43 bra 	$L__BB0_65;
	bra.uni 	$L__BB0_64;

$L__BB0_65:
	mul.ftz.f32 	%f606, %f597, %f597;
	mov.f32 	%f607, 0fBD563CAE;
	mov.f32 	%f608, 0f3C80F082;
	fma.rn.ftz.f32 	%f609, %f608, %f606, %f607;
	mov.f32 	%f610, 0f3E085941;
	fma.rn.ftz.f32 	%f611, %f609, %f606, %f610;
	mov.f32 	%f612, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f613, %f611, %f606, %f612;
	mov.f32 	%f614, 0f00000000;
	fma.rn.ftz.f32 	%f615, %f613, %f606, %f614;
	fma.rn.ftz.f32 	%f854, %f615, %f597, %f597;
	bra.uni 	$L__BB0_66;

$L__BB0_64:
	mul.ftz.f32 	%f598, %f123, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f599, %f598;
	add.ftz.f32 	%f600, %f599, 0f3F800000;
	mov.f32 	%f601, 0f3F800000;
	rcp.approx.ftz.f32 	%f602, %f600;
	mov.f32 	%f603, 0fC0000000;
	fma.rn.ftz.f32 	%f604, %f602, %f603, %f601;
	setp.ge.ftz.f32 	%p44, %f123, 0f41102CB4;
	selp.f32 	%f605, 0f3F800000, %f604, %p44;
	mov.b32 	%r96, %f605;
	mov.b32 	%r97, %f597;
	and.b32  	%r98, %r97, -2147483648;
	or.b32  	%r99, %r98, %r96;
	mov.b32 	%f854, %r99;

$L__BB0_66:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs122, %f854;}

	// end inline asm
	mov.b32 	%r100, %f12;
	mov.b32 	{%rs123, %rs57}, %r100;
	// begin inline asm
	{  cvt.f32.f16 %f617, %rs123;}

	// end inline asm
	abs.ftz.f32 	%f128, %f617;
	setp.ltu.ftz.f32 	%p45, %f128, 0f3F19999A;
	@%p45 bra 	$L__BB0_68;
	bra.uni 	$L__BB0_67;

$L__BB0_68:
	mul.ftz.f32 	%f626, %f617, %f617;
	mov.f32 	%f627, 0fBD563CAE;
	mov.f32 	%f628, 0f3C80F082;
	fma.rn.ftz.f32 	%f629, %f628, %f626, %f627;
	mov.f32 	%f630, 0f3E085941;
	fma.rn.ftz.f32 	%f631, %f629, %f626, %f630;
	mov.f32 	%f632, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f633, %f631, %f626, %f632;
	mov.f32 	%f634, 0f00000000;
	fma.rn.ftz.f32 	%f635, %f633, %f626, %f634;
	fma.rn.ftz.f32 	%f855, %f635, %f617, %f617;
	bra.uni 	$L__BB0_69;

$L__BB0_67:
	mul.ftz.f32 	%f618, %f128, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f619, %f618;
	add.ftz.f32 	%f620, %f619, 0f3F800000;
	mov.f32 	%f621, 0f3F800000;
	rcp.approx.ftz.f32 	%f622, %f620;
	mov.f32 	%f623, 0fC0000000;
	fma.rn.ftz.f32 	%f624, %f622, %f623, %f621;
	setp.ge.ftz.f32 	%p46, %f128, 0f41102CB4;
	selp.f32 	%f625, 0f3F800000, %f624, %p46;
	mov.b32 	%r101, %f625;
	mov.b32 	%r102, %f617;
	and.b32  	%r103, %r102, -2147483648;
	or.b32  	%r104, %r103, %r101;
	mov.b32 	%f855, %r104;

$L__BB0_69:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs124, %f855;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f637, %rs57;}

	// end inline asm
	abs.ftz.f32 	%f133, %f637;
	setp.ltu.ftz.f32 	%p47, %f133, 0f3F19999A;
	@%p47 bra 	$L__BB0_71;
	bra.uni 	$L__BB0_70;

$L__BB0_71:
	mul.ftz.f32 	%f646, %f637, %f637;
	mov.f32 	%f647, 0fBD563CAE;
	mov.f32 	%f648, 0f3C80F082;
	fma.rn.ftz.f32 	%f649, %f648, %f646, %f647;
	mov.f32 	%f650, 0f3E085941;
	fma.rn.ftz.f32 	%f651, %f649, %f646, %f650;
	mov.f32 	%f652, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f653, %f651, %f646, %f652;
	mov.f32 	%f654, 0f00000000;
	fma.rn.ftz.f32 	%f655, %f653, %f646, %f654;
	fma.rn.ftz.f32 	%f856, %f655, %f637, %f637;
	bra.uni 	$L__BB0_72;

$L__BB0_70:
	mul.ftz.f32 	%f638, %f133, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f639, %f638;
	add.ftz.f32 	%f640, %f639, 0f3F800000;
	mov.f32 	%f641, 0f3F800000;
	rcp.approx.ftz.f32 	%f642, %f640;
	mov.f32 	%f643, 0fC0000000;
	fma.rn.ftz.f32 	%f644, %f642, %f643, %f641;
	setp.ge.ftz.f32 	%p48, %f133, 0f41102CB4;
	selp.f32 	%f645, 0f3F800000, %f644, %p48;
	mov.b32 	%r105, %f645;
	mov.b32 	%r106, %f637;
	and.b32  	%r107, %r106, -2147483648;
	or.b32  	%r108, %r107, %r105;
	mov.b32 	%f856, %r108;

$L__BB0_72:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs126, %f856;}

	// end inline asm
	mov.b32 	%r109, %f13;
	mov.b32 	{%rs127, %rs62}, %r109;
	// begin inline asm
	{  cvt.f32.f16 %f657, %rs127;}

	// end inline asm
	abs.ftz.f32 	%f138, %f657;
	setp.ltu.ftz.f32 	%p49, %f138, 0f3F19999A;
	@%p49 bra 	$L__BB0_74;
	bra.uni 	$L__BB0_73;

$L__BB0_74:
	mul.ftz.f32 	%f666, %f657, %f657;
	mov.f32 	%f667, 0fBD563CAE;
	mov.f32 	%f668, 0f3C80F082;
	fma.rn.ftz.f32 	%f669, %f668, %f666, %f667;
	mov.f32 	%f670, 0f3E085941;
	fma.rn.ftz.f32 	%f671, %f669, %f666, %f670;
	mov.f32 	%f672, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f673, %f671, %f666, %f672;
	mov.f32 	%f674, 0f00000000;
	fma.rn.ftz.f32 	%f675, %f673, %f666, %f674;
	fma.rn.ftz.f32 	%f857, %f675, %f657, %f657;
	bra.uni 	$L__BB0_75;

$L__BB0_73:
	mul.ftz.f32 	%f658, %f138, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f659, %f658;
	add.ftz.f32 	%f660, %f659, 0f3F800000;
	mov.f32 	%f661, 0f3F800000;
	rcp.approx.ftz.f32 	%f662, %f660;
	mov.f32 	%f663, 0fC0000000;
	fma.rn.ftz.f32 	%f664, %f662, %f663, %f661;
	setp.ge.ftz.f32 	%p50, %f138, 0f41102CB4;
	selp.f32 	%f665, 0f3F800000, %f664, %p50;
	mov.b32 	%r110, %f665;
	mov.b32 	%r111, %f657;
	and.b32  	%r112, %r111, -2147483648;
	or.b32  	%r113, %r112, %r110;
	mov.b32 	%f857, %r113;

$L__BB0_75:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs128, %f857;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f677, %rs62;}

	// end inline asm
	abs.ftz.f32 	%f143, %f677;
	setp.ltu.ftz.f32 	%p51, %f143, 0f3F19999A;
	@%p51 bra 	$L__BB0_77;
	bra.uni 	$L__BB0_76;

$L__BB0_77:
	mul.ftz.f32 	%f686, %f677, %f677;
	mov.f32 	%f687, 0fBD563CAE;
	mov.f32 	%f688, 0f3C80F082;
	fma.rn.ftz.f32 	%f689, %f688, %f686, %f687;
	mov.f32 	%f690, 0f3E085941;
	fma.rn.ftz.f32 	%f691, %f689, %f686, %f690;
	mov.f32 	%f692, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f693, %f691, %f686, %f692;
	mov.f32 	%f694, 0f00000000;
	fma.rn.ftz.f32 	%f695, %f693, %f686, %f694;
	fma.rn.ftz.f32 	%f858, %f695, %f677, %f677;
	bra.uni 	$L__BB0_78;

$L__BB0_76:
	mul.ftz.f32 	%f678, %f143, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f679, %f678;
	add.ftz.f32 	%f680, %f679, 0f3F800000;
	mov.f32 	%f681, 0f3F800000;
	rcp.approx.ftz.f32 	%f682, %f680;
	mov.f32 	%f683, 0fC0000000;
	fma.rn.ftz.f32 	%f684, %f682, %f683, %f681;
	setp.ge.ftz.f32 	%p52, %f143, 0f41102CB4;
	selp.f32 	%f685, 0f3F800000, %f684, %p52;
	mov.b32 	%r114, %f685;
	mov.b32 	%r115, %f677;
	and.b32  	%r116, %r115, -2147483648;
	or.b32  	%r117, %r116, %r114;
	mov.b32 	%f858, %r117;

$L__BB0_78:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs130, %f858;}

	// end inline asm
	mov.b32 	%r118, %f14;
	mov.b32 	{%rs131, %rs67}, %r118;
	// begin inline asm
	{  cvt.f32.f16 %f697, %rs131;}

	// end inline asm
	abs.ftz.f32 	%f148, %f697;
	setp.ltu.ftz.f32 	%p53, %f148, 0f3F19999A;
	@%p53 bra 	$L__BB0_80;
	bra.uni 	$L__BB0_79;

$L__BB0_80:
	mul.ftz.f32 	%f706, %f697, %f697;
	mov.f32 	%f707, 0fBD563CAE;
	mov.f32 	%f708, 0f3C80F082;
	fma.rn.ftz.f32 	%f709, %f708, %f706, %f707;
	mov.f32 	%f710, 0f3E085941;
	fma.rn.ftz.f32 	%f711, %f709, %f706, %f710;
	mov.f32 	%f712, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f713, %f711, %f706, %f712;
	mov.f32 	%f714, 0f00000000;
	fma.rn.ftz.f32 	%f715, %f713, %f706, %f714;
	fma.rn.ftz.f32 	%f859, %f715, %f697, %f697;
	bra.uni 	$L__BB0_81;

$L__BB0_79:
	mul.ftz.f32 	%f698, %f148, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f699, %f698;
	add.ftz.f32 	%f700, %f699, 0f3F800000;
	mov.f32 	%f701, 0f3F800000;
	rcp.approx.ftz.f32 	%f702, %f700;
	mov.f32 	%f703, 0fC0000000;
	fma.rn.ftz.f32 	%f704, %f702, %f703, %f701;
	setp.ge.ftz.f32 	%p54, %f148, 0f41102CB4;
	selp.f32 	%f705, 0f3F800000, %f704, %p54;
	mov.b32 	%r119, %f705;
	mov.b32 	%r120, %f697;
	and.b32  	%r121, %r120, -2147483648;
	or.b32  	%r122, %r121, %r119;
	mov.b32 	%f859, %r122;

$L__BB0_81:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs132, %f859;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f717, %rs67;}

	// end inline asm
	abs.ftz.f32 	%f153, %f717;
	setp.ltu.ftz.f32 	%p55, %f153, 0f3F19999A;
	@%p55 bra 	$L__BB0_83;
	bra.uni 	$L__BB0_82;

$L__BB0_83:
	mul.ftz.f32 	%f726, %f717, %f717;
	mov.f32 	%f727, 0fBD563CAE;
	mov.f32 	%f728, 0f3C80F082;
	fma.rn.ftz.f32 	%f729, %f728, %f726, %f727;
	mov.f32 	%f730, 0f3E085941;
	fma.rn.ftz.f32 	%f731, %f729, %f726, %f730;
	mov.f32 	%f732, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f733, %f731, %f726, %f732;
	mov.f32 	%f734, 0f00000000;
	fma.rn.ftz.f32 	%f735, %f733, %f726, %f734;
	fma.rn.ftz.f32 	%f860, %f735, %f717, %f717;
	bra.uni 	$L__BB0_84;

$L__BB0_82:
	mul.ftz.f32 	%f718, %f153, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f719, %f718;
	add.ftz.f32 	%f720, %f719, 0f3F800000;
	mov.f32 	%f721, 0f3F800000;
	rcp.approx.ftz.f32 	%f722, %f720;
	mov.f32 	%f723, 0fC0000000;
	fma.rn.ftz.f32 	%f724, %f722, %f723, %f721;
	setp.ge.ftz.f32 	%p56, %f153, 0f41102CB4;
	selp.f32 	%f725, 0f3F800000, %f724, %p56;
	mov.b32 	%r123, %f725;
	mov.b32 	%r124, %f717;
	and.b32  	%r125, %r124, -2147483648;
	or.b32  	%r126, %r125, %r123;
	mov.b32 	%f860, %r126;

$L__BB0_84:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs134, %f860;}

	// end inline asm
	mov.b32 	%r127, %f15;
	mov.b32 	{%rs135, %rs72}, %r127;
	// begin inline asm
	{  cvt.f32.f16 %f737, %rs135;}

	// end inline asm
	abs.ftz.f32 	%f158, %f737;
	setp.ltu.ftz.f32 	%p57, %f158, 0f3F19999A;
	@%p57 bra 	$L__BB0_86;
	bra.uni 	$L__BB0_85;

$L__BB0_86:
	mul.ftz.f32 	%f746, %f737, %f737;
	mov.f32 	%f747, 0fBD563CAE;
	mov.f32 	%f748, 0f3C80F082;
	fma.rn.ftz.f32 	%f749, %f748, %f746, %f747;
	mov.f32 	%f750, 0f3E085941;
	fma.rn.ftz.f32 	%f751, %f749, %f746, %f750;
	mov.f32 	%f752, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f753, %f751, %f746, %f752;
	mov.f32 	%f754, 0f00000000;
	fma.rn.ftz.f32 	%f755, %f753, %f746, %f754;
	fma.rn.ftz.f32 	%f861, %f755, %f737, %f737;
	bra.uni 	$L__BB0_87;

$L__BB0_85:
	mul.ftz.f32 	%f738, %f158, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f739, %f738;
	add.ftz.f32 	%f740, %f739, 0f3F800000;
	mov.f32 	%f741, 0f3F800000;
	rcp.approx.ftz.f32 	%f742, %f740;
	mov.f32 	%f743, 0fC0000000;
	fma.rn.ftz.f32 	%f744, %f742, %f743, %f741;
	setp.ge.ftz.f32 	%p58, %f158, 0f41102CB4;
	selp.f32 	%f745, 0f3F800000, %f744, %p58;
	mov.b32 	%r128, %f745;
	mov.b32 	%r129, %f737;
	and.b32  	%r130, %r129, -2147483648;
	or.b32  	%r131, %r130, %r128;
	mov.b32 	%f861, %r131;

$L__BB0_87:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs136, %f861;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f757, %rs72;}

	// end inline asm
	abs.ftz.f32 	%f163, %f757;
	setp.ltu.ftz.f32 	%p59, %f163, 0f3F19999A;
	@%p59 bra 	$L__BB0_89;
	bra.uni 	$L__BB0_88;

$L__BB0_89:
	mul.ftz.f32 	%f766, %f757, %f757;
	mov.f32 	%f767, 0fBD563CAE;
	mov.f32 	%f768, 0f3C80F082;
	fma.rn.ftz.f32 	%f769, %f768, %f766, %f767;
	mov.f32 	%f770, 0f3E085941;
	fma.rn.ftz.f32 	%f771, %f769, %f766, %f770;
	mov.f32 	%f772, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f773, %f771, %f766, %f772;
	mov.f32 	%f774, 0f00000000;
	fma.rn.ftz.f32 	%f775, %f773, %f766, %f774;
	fma.rn.ftz.f32 	%f862, %f775, %f757, %f757;
	bra.uni 	$L__BB0_90;

$L__BB0_88:
	mul.ftz.f32 	%f758, %f163, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f759, %f758;
	add.ftz.f32 	%f760, %f759, 0f3F800000;
	mov.f32 	%f761, 0f3F800000;
	rcp.approx.ftz.f32 	%f762, %f760;
	mov.f32 	%f763, 0fC0000000;
	fma.rn.ftz.f32 	%f764, %f762, %f763, %f761;
	setp.ge.ftz.f32 	%p60, %f163, 0f41102CB4;
	selp.f32 	%f765, 0f3F800000, %f764, %p60;
	mov.b32 	%r132, %f765;
	mov.b32 	%r133, %f757;
	and.b32  	%r134, %r133, -2147483648;
	or.b32  	%r135, %r134, %r132;
	mov.b32 	%f862, %r135;

$L__BB0_90:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs138, %f862;}

	// end inline asm
	mov.b32 	%r136, %f16;
	mov.b32 	{%rs139, %rs77}, %r136;
	// begin inline asm
	{  cvt.f32.f16 %f777, %rs139;}

	// end inline asm
	abs.ftz.f32 	%f168, %f777;
	setp.ltu.ftz.f32 	%p61, %f168, 0f3F19999A;
	@%p61 bra 	$L__BB0_92;
	bra.uni 	$L__BB0_91;

$L__BB0_92:
	mul.ftz.f32 	%f786, %f777, %f777;
	mov.f32 	%f787, 0fBD563CAE;
	mov.f32 	%f788, 0f3C80F082;
	fma.rn.ftz.f32 	%f789, %f788, %f786, %f787;
	mov.f32 	%f790, 0f3E085941;
	fma.rn.ftz.f32 	%f791, %f789, %f786, %f790;
	mov.f32 	%f792, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f793, %f791, %f786, %f792;
	mov.f32 	%f794, 0f00000000;
	fma.rn.ftz.f32 	%f795, %f793, %f786, %f794;
	fma.rn.ftz.f32 	%f863, %f795, %f777, %f777;
	bra.uni 	$L__BB0_93;

$L__BB0_91:
	mul.ftz.f32 	%f778, %f168, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f779, %f778;
	add.ftz.f32 	%f780, %f779, 0f3F800000;
	mov.f32 	%f781, 0f3F800000;
	rcp.approx.ftz.f32 	%f782, %f780;
	mov.f32 	%f783, 0fC0000000;
	fma.rn.ftz.f32 	%f784, %f782, %f783, %f781;
	setp.ge.ftz.f32 	%p62, %f168, 0f41102CB4;
	selp.f32 	%f785, 0f3F800000, %f784, %p62;
	mov.b32 	%r137, %f785;
	mov.b32 	%r138, %f777;
	and.b32  	%r139, %r138, -2147483648;
	or.b32  	%r140, %r139, %r137;
	mov.b32 	%f863, %r140;

$L__BB0_93:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs140, %f863;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f797, %rs77;}

	// end inline asm
	abs.ftz.f32 	%f173, %f797;
	setp.ltu.ftz.f32 	%p63, %f173, 0f3F19999A;
	@%p63 bra 	$L__BB0_95;
	bra.uni 	$L__BB0_94;

$L__BB0_95:
	mul.ftz.f32 	%f806, %f797, %f797;
	mov.f32 	%f807, 0fBD563CAE;
	mov.f32 	%f808, 0f3C80F082;
	fma.rn.ftz.f32 	%f809, %f808, %f806, %f807;
	mov.f32 	%f810, 0f3E085941;
	fma.rn.ftz.f32 	%f811, %f809, %f806, %f810;
	mov.f32 	%f812, 0fBEAAA9ED;
	fma.rn.ftz.f32 	%f813, %f811, %f806, %f812;
	mov.f32 	%f814, 0f00000000;
	fma.rn.ftz.f32 	%f815, %f813, %f806, %f814;
	fma.rn.ftz.f32 	%f864, %f815, %f797, %f797;
	bra.uni 	$L__BB0_96;

$L__BB0_94:
	mul.ftz.f32 	%f798, %f173, 0f4038AA3B;
	ex2.approx.ftz.f32 	%f799, %f798;
	add.ftz.f32 	%f800, %f799, 0f3F800000;
	mov.f32 	%f801, 0f3F800000;
	rcp.approx.ftz.f32 	%f802, %f800;
	mov.f32 	%f803, 0fC0000000;
	fma.rn.ftz.f32 	%f804, %f802, %f803, %f801;
	setp.ge.ftz.f32 	%p64, %f173, 0f41102CB4;
	selp.f32 	%f805, 0f3F800000, %f804, %p64;
	mov.b32 	%r141, %f805;
	mov.b32 	%r142, %f797;
	and.b32  	%r143, %r142, -2147483648;
	or.b32  	%r144, %r143, %r141;
	mov.b32 	%f864, %r144;

$L__BB0_96:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs142, %f864;}

	// end inline asm
	mov.b32 	%r145, {%rs140, %rs142};
	mov.b32 	%r146, {%rs80, %rs82};
	mov.b32 	%r147, {%rs84, %rs86};
	mov.b32 	%r148, {%rs88, %rs90};
	mov.b32 	%r149, {%rs92, %rs94};
	mov.b32 	%r150, {%rs96, %rs98};
	mov.b32 	%r151, {%rs100, %rs102};
	mov.b32 	%r152, {%rs104, %rs106};
	mov.b32 	%r153, {%rs108, %rs110};
	mov.b32 	%r154, {%rs112, %rs114};
	mov.b32 	%r155, {%rs116, %rs118};
	mov.b32 	%r156, {%rs120, %rs122};
	mov.b32 	%r157, {%rs124, %rs126};
	mov.b32 	%r158, {%rs128, %rs130};
	mov.b32 	%r159, {%rs132, %rs134};
	mov.b32 	%r160, {%rs136, %rs138};
	mov.b32 	%f817, %r145;
	mov.b32 	%f818, %r160;
	mov.b32 	%f819, %r159;
	mov.b32 	%f820, %r158;
	mov.b32 	%f821, %r157;
	mov.b32 	%f822, %r156;
	mov.b32 	%f823, %r155;
	mov.b32 	%f824, %r154;
	mov.b32 	%f825, %r153;
	mov.b32 	%f826, %r152;
	mov.b32 	%f827, %r151;
	mov.b32 	%f828, %r150;
	mov.b32 	%f829, %r149;
	mov.b32 	%f830, %r148;
	mov.b32 	%f831, %r147;
	mov.b32 	%f832, %r146;
	st.param.f32 	[func_retval0+0], %f832;
	st.param.f32 	[func_retval0+4], %f831;
	st.param.f32 	[func_retval0+8], %f830;
	st.param.f32 	[func_retval0+12], %f829;
	st.param.f32 	[func_retval0+16], %f828;
	st.param.f32 	[func_retval0+20], %f827;
	st.param.f32 	[func_retval0+24], %f826;
	st.param.f32 	[func_retval0+28], %f825;
	st.param.f32 	[func_retval0+32], %f824;
	st.param.f32 	[func_retval0+36], %f823;
	st.param.f32 	[func_retval0+40], %f822;
	st.param.f32 	[func_retval0+44], %f821;
	st.param.f32 	[func_retval0+48], %f820;
	st.param.f32 	[func_retval0+52], %f819;
	st.param.f32 	[func_retval0+56], %f818;
	st.param.f32 	[func_retval0+60], %f817;
	ret;

}