8];

.visible .func  (.param .align 4 .b8 func_retval0[16]) activation_4(
	.param .align 4 .b8 activation_4_param_0[16]
)
{
.pragma "abi_param_reg all";
	.reg .pred 	%p<9>;
	.reg .b16 	%rs<35>;
	.reg .f32 	%f<92>;
	.reg .b32 	%r<9>;


	ld.param.f32 	%f1, [activation_4_param_0];
	mov.b32 	%r1, %f1;
	ld.param.f32 	%f4, [activation_4_param_0+12];
	ld.param.f32 	%f3, [activation_4_param_0+8];
	ld.param.f32 	%f2, [activation_4_param_0+4];
	ld.const.f32 	%f40, [params+4];
	ld.const.f32 	%f5, [params];
	mul.ftz.f32 	%f6, %f40, %f5;
	mov.b32 	{%rs19, %rs2}, %r1;
	// begin inline asm
	{  cvt.f32.f16 %f39, %rs19;}

	// end inline asm
	setp.gt.ftz.f32 	%p1, %f39, 0f00000000;
	@%p1 bra 	$L__BB0_2;
	bra.uni 	$L__BB0_1;

$L__BB0_2:
	mul.ftz.f32 	%f84, %f39, %f5;
	bra.uni 	$L__BB0_3;

$L__BB0_1:
	mul.ftz.f32 	%f41, %f39, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f42, %f41;
	add.ftz.f32 	%f43, %f42, 0fBF800000;
	mul.ftz.f32 	%f84, %f6, %f43;

$L__BB0_3:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs20, %f84;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f45, %rs2;}

	// end inline asm
	setp.gt.ftz.f32 	%p2, %f45, 0f00000000;
	@%p2 bra 	$L__BB0_5;
	bra.uni 	$L__BB0_4;

$L__BB0_5:
	mul.ftz.f32 	%f85, %f45, %f5;
	bra.uni 	$L__BB0_6;

$L__BB0_4:
	mul.ftz.f32 	%f46, %f45, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f47, %f46;
	add.ftz.f32 	%f48, %f47, 0fBF800000;
	mul.ftz.f32 	%f85, %f6, %f48;

$L__BB0_6:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs22, %f85;}

	// end inline asm
	mov.b32 	%r2, %f2;
	mov.b32 	{%rs23, %rs7}, %r2;
	// begin inline asm
	{  cvt.f32.f16 %f50, %rs23;}

	// end inline asm
	setp.gt.ftz.f32 	%p3, %f50, 0f00000000;
	@%p3 bra 	$L__BB0_8;
	bra.uni 	$L__BB0_7;

$L__BB0_8:
	mul.ftz.f32 	%f86, %f50, %f5;
	bra.uni 	$L__BB0_9;

$L__BB0_7:
	mul.ftz.f32 	%f51, %f50, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f52, %f51;
	add.ftz.f32 	%f53, %f52, 0fBF800000;
	mul.ftz.f32 	%f86, %f6, %f53;

$L__BB0_9:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs24, %f86;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f55, %rs7;}

	// end inline asm
	setp.gt.ftz.f32 	%p4, %f55, 0f00000000;
	@%p4 bra 	$L__BB0_11;
	bra.uni 	$L__BB0_10;

$L__BB0_11:
	mul.ftz.f32 	%f87, %f55, %f5;
	bra.uni 	$L__BB0_12;

$L__BB0_10:
	mul.ftz.f32 	%f56, %f55, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f57, %f56;
	add.ftz.f32 	%f58, %f57, 0fBF800000;
	mul.ftz.f32 	%f87, %f6, %f58;

$L__BB0_12:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs26, %f87;}

	// end inline asm
	mov.b32 	%r3, %f3;
	mov.b32 	{%rs27, %rs12}, %r3;
	// begin inline asm
	{  cvt.f32.f16 %f60, %rs27;}

	// end inline asm
	setp.gt.ftz.f32 	%p5, %f60, 0f00000000;
	@%p5 bra 	$L__BB0_14;
	bra.uni 	$L__BB0_13;

$L__BB0_14:
	mul.ftz.f32 	%f88, %f60, %f5;
	bra.uni 	$L__BB0_15;

$L__BB0_13:
	mul.ftz.f32 	%f61, %f60, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f62, %f61;
	add.ftz.f32 	%f63, %f62, 0fBF800000;
	mul.ftz.f32 	%f88, %f6, %f63;

$L__BB0_15:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs28, %f88;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f65, %rs12;}

	// end inline asm
	setp.gt.ftz.f32 	%p6, %f65, 0f00000000;
	@%p6 bra 	$L__BB0_17;
	bra.uni 	$L__BB0_16;

$L__BB0_17:
	mul.ftz.f32 	%f89, %f65, %f5;
	bra.uni 	$L__BB0_18;

$L__BB0_16:
	mul.ftz.f32 	%f66, %f65, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f67, %f66;
	add.ftz.f32 	%f68, %f67, 0fBF800000;
	mul.ftz.f32 	%f89, %f6, %f68;

$L__BB0_18:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs30, %f89;}

	// end inline asm
	mov.b32 	%r4, %f4;
	mov.b32 	{%rs31, %rs17}, %r4;
	// begin inline asm
	{  cvt.f32.f16 %f70, %rs31;}

	// end inline asm
	setp.gt.ftz.f32 	%p7, %f70, 0f00000000;
	@%p7 bra 	$L__BB0_20;
	bra.uni 	$L__BB0_19;

$L__BB0_20:
	mul.ftz.f32 	%f90, %f70, %f5;
	bra.uni 	$L__BB0_21;

$L__BB0_19:
	mul.ftz.f32 	%f71, %f70, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f72, %f71;
	add.ftz.f32 	%f73, %f72, 0fBF800000;
	mul.ftz.f32 	%f90, %f6, %f73;

$L__BB0_21:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs32, %f90;}

	// end inline asm
	// begin inline asm
	{  cvt.f32.f16 %f75, %rs17;}

	// end inline asm
	setp.gt.ftz.f32 	%p8, %f75, 0f00000000;
	@%p8 bra 	$L__BB0_23;
	bra.uni 	$L__BB0_22;

$L__BB0_23:
	mul.ftz.f32 	%f91, %f75, %f5;
	bra.uni 	$L__BB0_24;

$L__BB0_22:
	mul.ftz.f32 	%f76, %f75, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f77, %f76;
	add.ftz.f32 	%f78, %f77, 0fBF800000;
	mul.ftz.f32 	%f91, %f6, %f78;

$L__BB0_24:
	// begin inline asm
	{  cvt.rn.f16.f32 %rs34, %f91;}

	// end inline asm
	mov.b32 	%r5, {%rs32, %rs34};
	mov.b32 	%r6, {%rs20, %rs22};
	mov.b32 	%r7, {%rs24, %rs26};
	mov.b32 	%r8, {%rs28, %rs30};
	mov.b32 	%f80, %r5;
	mov.b32 	%f81, %r8;
	mov.b32 	%f82, %r7;
	mov.b32 	%f83, %r6;
	st.param.f32 	[func_retval0+0], %f83;
	st.param.f32 	[func_retval0+4], %f82;
	st.param.f32 	[func_retval0+8], %f81;
	st.param.f32 	[func_retval0+12], %f80;
	ret;

}